FPGA Infra Developer
Summary
qSpark is hiring a C++ developer with FPGA infrastructure experience to build and maintain low-latency, performance-critical trading infrastructure written in HLS C++ for Vivado HLS synthesis. Day to day, they write high-performance C++ for FPGA synthesis, handle lower-level FPGA code, and optimize build and synthesis environments.
qSpark is looking for a highly skilled C++ Developer with background in FPGA infrastructure to join our team working on FPGA trading solutions.
Our FPGA infrastructure is mostly based on HLS C++, but some lower-level tasks are expected from time to time, requiring knowledge and experience with the underlying technologies.
This role demands someone who thrives in fast-paced environments, and is eager to take ownership of performance-critical live systems.
Responsibilities:
- Develop and maintain low-latency, high-performance infrastructure code written in C++ for synthesis with Vivado HLS.
- Develop and maintain lower-level FPGA code and optimize mid-level build & synthesis environments.
Requirements
- HLS experience - Mandatory
- VHDL - Advantage
- General Modern C++ (17+)
- 2 years experience
- Strong problem-solving skills and a strong sense of accountability.
- Advantage - knowledge in financial and stock markets.