High-Speed DSP SerDes 演算法工程師0201

1. Develop and optimize TED, EQ (FFE/DFE/MLSD), and ADC Calibration algorithms for 200G+ SERDES designs
2. Build algorithm specifications and perform fixed-point analysis; verify performance using MATLAB, Python, and Verilog-based behavioral models
3. Collaborate closely with mixed-signal engineers on AFE/DSP co-design and circuit-level validation using Cadence Virtuoso
4. Partner with digital design engineers on RTL implementation, timing closure, and silicon bring-up
5. Perform system budget analysis and performance evaluation (BER, latency, power, area
6. Support silicon validation through test plan development, measurement-based model calibration, and performance corner characterization
7. Research and evaluate advanced techniques (PAM4, ML-assisted equalization, advanced coding schemes) for next-generation SERDES