IC Physical Design Engineer
Description
Job Description
• IC physical design of 12nm/6nm/4nm and below world leading advanced process chip, from RTL to GDS.
• Block owner, take block of 2~3 million instances, working on Synthesis/APR (auto place and route)/Signoff.
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout.
Job Requirements
• Basic knowledge of electronic design or IC design, internship experience in related area is preferred.
• Basic knowledge of UNIX/LINUX env and capable of at least one of the following programming languages: C/C++, Python, TCL, Perl.
• Good communication and teamwork spirit, eager to learn new technologies and willing to take challenges.
Interested candidates may apply through the application system. We regret to inform only Shortlisted candidates will be notified.
PERSOL Singapore Pte Ltd • RCB No. 200007268E • EA License No. 01C4394
By sending us your personal data and curriculum vitae (CV), you are deemed to consent to PERSOL Singapore Pte Ltd and its affiliates to collect, use and disclose your personal data for the purposes set out in the Privacy Policy available at https://www.persolsingapore.com/policies. You acknowledge that you have read, understood, and agree with the Privacy Policy.
