Memory Compiler Application Engineer

工作項目：
Memory Compiler quality verification and support。

應徵條件：
1. 碩士以上; 電機、電子、資工相關科系畢業為主。
2. Familiar with front-end & back-end model including verilog, liberty (nldm/ccs/lvf), dft, redhawk, lef, spice view。
3. Familiar with physical verification flows including drc, erc, lvs, rc extraction。
4. Familiar with Hspice, Spectre, Solido simulation tool & Virtuso, Laker layout tool。
5. Familiar with Scripting language: Python/Verilog/TCL/Shell/Makefile/C。
6. 具以下條件者佳：
(1) 熟悉SRAM操作原理及bit cell特性。
(2) 從事SRAM錯誤分析及良率改善。
(3) 具矽智財合約管理經驗。