NPU Post Silicon & Low Power Engineer

1. plan test plans and function pattern for MP
2. Test and Verify IC functionality, performance, power etc.
3. Analysis ATE test data, Clarify testing issue, yield improvement
4. AVS design for low power

Requirements

1. Familiar with Verilog/SystemVerilog
2. Familiar with IC design and MP flow
Good to have:
1. Familiar with Perl and Python
2. Familiar with low power methodology
Education: Master's Degree