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Physical Design Engineer

Open 63d

Job Description:

Physical design implementation at block or top level, low power techniques and timing closure

Job Duties Include:

- Will own all parts of the physical design process from netlist handoff to tapeout including floorplanning, place and route, clock tree synthesis, timing closure and physical verification

- Verify effects of crosstalk, IR drop and electromigration

- Very comfortable writing scripts in TCL and Perl to achieve higher performance and productivity through automation

- Work very closely with logic designers, who are members of this same group, to build complex SOC's

Job Requirements:

- BSEE with 6+ (or MSEE with 3+) years related experience;

- Physical design knowledge, from netlist handoff to GDS tapeout including floorplanning, place and route, clock tree synthesis, timing closure and physical verification

- Experience with 45nm or 28nm technology

- Experience with low power techniques

- Experience with TCL and Perl

- Excellent communication and presentation skills

- Well organized, methodical and detail oriented

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