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美商賽發馥股份有限公司臺灣分公司

Senior Design Verification Engineer

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Description

The Role:
As a Design Verification Engineer, you will work with CPU designers, compiler team, performance team, and system verification team to generate the test cases automatically to fit those teams' verification requirements from different perspectives. Your responsibilities will target developing internal processor model to verify hardware design and establishing a random instruction test generator that produces self-checking direct test cases.

Responsibilities:

  • Review and influence product definition and specifications from a verification perspective and collaborate closely with the design team on feature specifications, test plans, and failure analysis.
  • Implement internal processor model to support all new features of RISCV world and SiFive special design.
  • Develop tools, test benches, and test suites (C/C++/Python, systemverilog is plus) to execute test plans.

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