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Oxford Metrics

Senior FPGA Engineer

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Summary

A senior FPGA design engineer at Vicon (Oxford Metrics) in Yarnton, Oxfordshire, designing and verifying VHDL/Verilog for motion capture cameras, calibration devices, and synchronisation/networking hardware, owning timing closure, test coverage, and full product lifecycle from concept to manufacturing support.

Are you interested in working on products at the very cutting edge of technology? Want to join Vicon, an Academy Award®-winning company, and the world’s largest supplier of precision motion capture and tracking systems?
Vicon is the world leader in motion capture technology, developing high performance software and hardware products for the entertainment, engineering and life science industries. Vicon products are used in major feature films, games, and commercials, and are a crucial measurement tool for biomechanics, robotics, and cutting-edge science.

Vicon is a subsidiary of Oxford Metrics Plc.

Role Summary:

We are looking for a Senior FPGA Design Engineer to join our development team in Oxford. Reporting to the Lead Hardware Development Engineer, you will form part of the team creating industry leading hardware products.
• Design and verification of FPGA code for a range of hardware products including high-speed motion capture and video cameras, calibration devices and synchronisation and networking equipment.
• Ensure all FPGA designs achieve required level of timing closure and functional performance before release.
• Code reviews of existing and new VHDL/Verilog files.
• Working alongside a team comprising of electronic, mechanical and software design engineers in the creation of high performing and cost-effective solutions.
• Ensuring designs have appropriate test coverage for development and manufacture and that designs meet appropriate regulatory compliance.
• Full product lifecycle involvement from early conceptual studies through to manufacturing support post-release.
• Strong demonstratable experience in VHDL including implementation of algorithms. Verilog experience an advantage.
• Experience in compilation timing closure is essential.
• Working knowledge of interface standards such as LVDS, PCIE, GMII etc
• Skilled in testbench generation and verification on new design features
• Competent with Version Control System tools, like Git, SVN, etc
• A knowledge of high-speed digital design, a working knowledge of analogue design and experience of developing products for manufacture with an emphasis on DFM/DFT would be advantageous.
• Suitable candidates will be educated to degree level in Electronic Engineering (or equivalent) with demonstrable and relevant industry experience.
• A working knowledge of image sensors, optics, Ethernet and RF Design would be advantageous, as would using AI to augment your work.

We’re looking for an outgoing, confident and self-motivated candidate that will be a great fit within our small and highly experienced team of engineers.
· Competitive salary
· 10% Company Pension
· 25 days Annual Leave + Bank Holidays
· Life Cover
· Private Medical with Optical / Dental Insurance
· Permanent Health Insurance
· Cycle to work scheme.
· Free On-site Parking

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