Senior physical Design Engineer (APR)

1. Perform physical design flow(Netlist-to-GDS), including Library preparation, Floorplan ,Powerplan, Placement, Clock tree synthesis, Timing optimization, and Routing.
2. Perform physical verification, including DRC, LVS, IR drop analysis.
3. Familiar with EDA tools, such as Fusion Compiler/ICC/ICC2 is a plus
4. Support STA timing analysis and timing closure.
5. TCL , Perl or Python script language skill is preferred.