數位IC驗證工程師(定期契約)

1. Develop integrated verification environment.
2. Verify designs with system verilog and system verilog assertion.
3. Develop and optimize verification flow and methodology.
4. Good knowledge of ASIC design flow.
5. Experience with the verification methodology such as VMM, OVM, or UVM.
6. Scripting experience using scripting languages like Perl and Python.