數位IC驗證資深工程師/專案副理R1
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Summary
Verifies a CPU design at Realtek in Hsinchu: owns test plans and testbench implementation, runs block- and top-level verification with SystemVerilog, SVA and UVM, and applies formal property checking. Needs solid computer-architecture fundamentals and a master's degree in EE/CS/electronics.
工作項目：
Verification for a CPU design project, which includes:
- Responsibility for test plans, testbench documentation and implementation.
- Use SystemVerilog language, SVA and UVM methodology for block and top level verification.
- Apply formal property checking/formal verification methodologies
- Understanding of the fundamentals of computer architecture
應徵條件：
1. 碩士以上；電機、電機與控制、資訊工程、電子相關科系畢業為主。
2. 具相關工作經驗者尤佳。