伺服器FPGA主管(內湖) - TWIR03043

1.Familiarity with VHDL/Verilog coding and FPGA/CPLD design flow is a must
2.Familiarity with FPGA/CPLD design in server application and bus protocols including I2C / power sequence / SPI / LPC / SGPIO / I2C switch/ UART / PWM / eSPI
3.Familiarity with Lattice/Altera EDA design tool.
4.Strong HW and x86 architecture knowledge.
5.Integration and simulation experience
6.Issue Fail symptom Anlayze and Tracker

※依學經歷、工作年資敘薪