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Signal Integrity Design Engineer

As a Signal Integrity Engineer, you will play a crucial role in ensuring the integrity and performance of high-speed PCB channels. Your expertise will be utilized to simulate and analyze ultra high-speed PCB channels, including connectors, breakouts, and via structures, for SerDes rates of 112G and beyond. You will provide valuable guidance to Digital Hardware Designers, leveraging your simulated and empirical results to optimize their designs.

  • Simulate ultra high-speed PCB channels (112G+ SerDes rates) with connectors, breakouts, and via structures.
  • Offer signal integrity guidance to Digital Hardware Designers, utilizing simulated and empirical data.
  • Collaborate with the design team to ensure optimal signal integrity and performance.
  • Conduct hands-on measurements using TDR/VNA equipment and oscilloscopes.
  • Stay updated with the latest technologies and industry trends in signal integrity and high-speed PCB design.
  • Document and communicate simulation results and provide recommendations to the design team.
  • Work closely with cross-functional teams to align on design requirements and specifications.
  • Support the development and implementation of signal integrity best practices within the organization.
  • Minimum B.Sc. or B.Eng. in Electrical Engineering or Computer Engineering.
  • 10+ years of experience simulating high-speed SerDes in PCB applications.
  • Expertise in using Ansys HFSS or Dassault CST simulation tools is mandatory.
  • Hands-on measurement skills with TDR/VNA equipment and oscilloscopes are essential.
  • Excellent interpersonal and communication skills for effective collaboration.
  • Familiarity with Mentor Hyperlynx, HSpice, and Cadence Allegro is preferred.
  • Knowledge of PAM4 transmitter and receiver technologies, including FIR, CTLE, DFE, and FEC, is an asset.
  • Experience with EMC/EMI theoretical aspects and ITU/IEEE/Bellcore telecommunications standards is advantageous.
  • Programming/Scripting skills in C, Python, or Matlab are desirable.
  • A strong understanding of high-speed digital design principles and techniques.

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