Staff Layout Design Engineer
Posted Updated
Description
Description
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In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using Cadence Virtuoso XL and Mentor’s Calibre tools. |
Responsibilities
Responsibilities
- Work closely with design engineers to ensure proper circuit performance
- Design analog and RF layout
- Understand device matching techniques
- Excellent teamwork skills, including written and verbal communications, with both local and remote design teams
- Exceptional layout planning and integration skills from small block to full chip
Required Experience and Skills
Skills and Qualifications
- Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC layout experience
- Ability to layout analog circuitry in a size/time constrained environment
- Understand layout techniques such as common centroid, matching, isolation, and the use of dummy devices
- Ability to solve design problems using technical skills, intuition, and creativity
- Proficiency in floorplanning and assembly from block to full chip level
- Working knowledge of Cadence and Mentor Verification tools
- Strong LVS troubleshooting and debug skills
- Demonstrated ability to work individually and in a team-orientated environment
Desired Experience and Skills
Preferred Skills and Qualifications
- BSEE/BS Engineering Technology or related program
- Comfortable with CMOS and SOI technologies across multiple foundry PDKs
- Demonstrated ability to contribute ideas for improved schematic and layout interaction
- Schematic entry for dummy devices, resizing devices, and debugging LVS issues.
This position is not eligible for visa sponsorship by the Company.