【台北】Physical Design Engineer, Senior to Staff Level (3085420)

【Talents who apply job through Qualcomm Career Website will be reviewed and considered as top priority】

Please apply directly on Qualcomm Career Site via link below, and attach your English resume for further review. Thank you!

https://careers.qualcomm.com/careers/job/446716566628

【General Summary】

The Physical Design Engineer is responsible for the complete physical implementation of complex digital integrated circuits (ASICs/SoCs) from netlist to GDSII. This role involves turning logical circuit designs into physical layouts that meet timing, power, area, and reliability constraints.

【Key Responsibilities】

•Netlist-to-GDSII Implementation: Execute the full physical design flow including Floorplanning, Power Planning, Placement, Clock Tree Synthesis (CTS), and Routing.
•Timing Analysis & Closure: Perform Static Timing Analysis (STA) to identify and fix setup/hold violations across various process corners and modes (PVT).
•Physical Verification: Run and resolve Design Rule Checks (DRC), Layout vs. Schematic (LVS), and Electrical Rule Checks (ERC) to ensure manufacturability.
•Power Optimization: Implement low-power design techniques (multi-voltage, power gating) and analyze IR drop/EM (Electromigration).
•Signal Integrity: Analyze and mitigate crosstalk, noise, and signal integrity issues.
•Flow Automation: Develop and maintain scripts (Tcl, Shell, Perl, Makefile) to automate design flows and improve efficiency.

【Technical Skills & Tools】

•EDA Tools, proficiency with industry-standard tools such as
•Synopsys: ICC2, Fusion Compiler, PrimeTime, StarRC, Redhawk.
•Siemens/Mentor: Calibre (for DRC/LVS/PERC).

Domain Knowledge

•Deep understanding of CMOS digital circuit design, standard cell libraries, and memory macros.
•Knowledge of lower geometry technology nodes (e.g., 12nm, 7nm, 5nm) and their specific physical constraints.

Scripting

•Strong scripting skills in Tcl, Shell, Makefile or Perl for tool customization and data parsing.

【Qualifications】

•Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
•Experience: Experience ranges around 5-8 years, with responsibility for block-level or full-chip ownership.