Timing Analog Mixed Signal Design Summer 2027 Intern

Description

Seeking an analog/mixed-signal design intern for developing complex mixed-signal ICs for Frequency Control, Clock Generation, and other Timing applications. Many of the ICs include phase-locked loops, sigma-delta modulators, ADCs, and various other mixed-signal circuits. The individual will design transistor-level analog circuit blocks, simulate sub-system performance, create and use behavioral models of blocks, do and/or supervise physical layout, verify circuit and chip-level operation and performance, and assist with tape-out related activities. Responsibilities will also include detailed documentation, silicon evaluation and debugging, production test development support, customer support, and other activities as required for the achievement of high-volume production. This summer internship duration will be from June 2027-August 2027.

Responsibilities

Analog/mixed-signal circuit and sub-system design, analysis, and implementation (including schematic entry, simulation, layout supervision, etc.)

Development and use of system-level noise models for evaluation of system-level trade-offs. Improvement of the models and re-simulation throughout the design cycle according to simulated circuit performance to ensure spec compliance of the final overall IC

Development and use of behavioral models for simulation of analog and mixed-signal circuits. Verification of analog and mixed-signal sub-systems and the entire chip using transistor-level and behavioral models.

Laboratory measurements and validation of ICs

Assistance with the development of efficient production tests and with customer support

Required Experience and Skills

M.S. or Ph. D. in Electrical Engineering

Strong motivation to contribute to all facets of chip design from conceptualization to release to mass production

Experience with analog and/or mixed-signal IC circuit design in a CAD environment

Strong knowledge of analog/mixed-signal circuit concepts, simulation, and testing techniques

Good verbal and written communication and presentation skills, positive attitude, and willingness to work on a team as a technical leader and mentor to junior members

Working knowledge of UNIX, Matlab, and circuit simulation tools

Additional SKills (One or more of these are highly desirable)

Experience/knowledge of analog/mixed-signal techniques used in clocking and timing ICs (e.g. PLLs, charge pumps, filters, VCOs, sigma-delta modulators, XOs, multi-format output drivers, system noise analysis, spur management, layout trade-offs, etc.)

Experience leading other analog/mixed-signal designers, either formally or informally

Experience with IO formats such as LVDS, LVPECL, LVCMOS, CML, HCSL, etc.

Low-noise analog circuit techniques

Low power design and implementation techniques

High-speed, high-performance analog/mixed-signal circuit design techniques

Experience with IC design at geometries ranging from 130-55 nm.

Competence in high-level languages (e.g. Matlab, C), scripting languages (e.g. Python, TCL, Perl, SKILL), and version control systems (e.g. SVN, SOS).

Desired Experience and Skills

Previous industry experience in high speed analog/Timing circuits

AI tool familiarity to accelerate design process