Virtual Prototype Engineer

Hello All,

We are hiring

Role: Virtual Prototype Engineer

Job Location: Bangalore and Hyderabad

Kindly share your updated resume to (syamanthula.krishnamahesh@tessolve.com)

Note: If your profile is not relevant to the current opportunity, kindly ignore this email.

Areas of Responsibility:

• Create Virtual Development Kits (VDKs) using Synopsys Virtualizer and Synopsys IP models.
• Integrate CPU, GPU, PCIe, UCIe, DDR, and peripheral IP models into a cohesive virtual platform.
• Develop SystemC/TLM2.0 models for custom IP blocks, peripherals, and SoC components.
• Build and maintain virtual prototypes for presilicon software development and SoC bringup.
• Develop scripts and automation for VDK assembly, configuration, and validation.
• Work closely with hardware design teams to interpret RTL specifications and convert them into SystemC/TLM models.
• Validate functional correctness of models through directed tests, regressions, and cosimulation with RTL. Support firmware, driver, and OS teams using the VDK for early bringup and debugging.
• Optimize model performance, timing accuracy, and simulation speed.
• Document model behavior, APIs, and integration guidelines for internal and external teams.

Experience:

• 5+ years of experience in virtual prototyping, SystemC/TLM2.0 modeling, or presilicon software enablement.
• Handson experience with Synopsys Virtualizer, Platform Architect, or similar virtual prototyping tools.
• Strong proficiency in SystemC, C++, and TLM2.0 transactionlevel modeling. Experience integrating Synopsys IP models (ARC, PCIe, USB, DDR, GPU, etc.) into VDKs.
• Understanding of SoC architecture: buses, interconnects, interrupts, memory maps, and clock/reset domains.
• Familiarity with embedded software bringup (bootloaders, drivers, OS kernels).
• Experience debugging complex interactions between models, firmware, and drivers. Nice to have:
• H perience with Synopsys VDK, QEMU, Simics, or other virtual platforms Exposure to RTL (Verilog/VHDL) and cosimulation flows Knowledge of PCIe, UCIe, CXL, or other highspeed interconnects Python/Perl scripting for automationH