【新竹】類比IC設計工程師

1. Familiar with SerDes PHY and building blocks (TIA, CTLE, VGA, TI-SAR ADC, CDR, PLL and TX Driver).
2. Familiar with high-speed SAR based analog to digital converter design/operation.
3. Familiar with time-interleaving sampling network/analog to digital converter design and simulation process.
4. Knowledge of high-speed serial link communication system is a plus.
5. Experience in design and simulation of high-speed transceiver is a plus.