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Designs and tests embedded hardware systems, creates schematics and documentation, and collaborates with cross-functional teams to bring products from concept to production.
Designs and maintains RF hardware and systems for a defence contractor, including RF design, testing, debugging, and real-time system integration.
Design and implement the clocking logic for NVIDIA’s next-gen networking chips, writing synthesizable Verilog/SystemVerilog RTL for clock generation, distribution, and domain-crossing infrastructure.
Lead the RTL design and implementation of clocking logic for NVIDIA’s next-gen networking chips, including PLL integration, clock distribution, and reset synchronization, guiding the team from spec to silicon.
Lead APQP/PPAP processes for medical-electronics products, ensuring regulatory compliance and smooth NPI through DFMEA, PFMEA, and supplier audits.
Install, maintain, and troubleshoot hardware in a large-scale data center, supporting the technical team with racking, cabling, and equipment diagnostics.
Oversee operational delivery and governance for OpenAI's third-party infrastructure partners, ensuring reliability and performance of cloud and compute services that power AI workloads.
Lead WHOOP’s hardware product strategy, guiding a team to design and launch wearable devices that unlock human performance and health insights.
Hardware Quality Engineer at Lambda ensures AI cloud infrastructure reliability by tracking issues, performing root cause analysis, and improving RMA processes for GPU/data-center hardware.
Intern designs FPGA/ASIC solutions for ultra-low-latency trading systems, writing and verifying RTL in SystemVerilog and bringing designs up on live hardware.
Design and verify custom silicon chips for next-generation data storage hardware, using RTL, Verilog/SystemVerilog, and digital logic while collaborating with cross-functional engineering teams.
Design and verify custom silicon and hardware for next-generation data storage devices, collaborating across ASIC, firmware, and systems engineering teams using RTL, Verilog, and embedded C/C++.
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Teach computer engineering and hardware design at undergraduate and postgraduate levels, develop curriculum, and supervise student projects in hardware architecture and digital systems.
Lead a hardware engineering team to design, validate, and deploy photonics-based systems for AI infrastructure, including board bring-up, debugging, and vendor collaboration.
Maintain and troubleshoot server hardware in data centers, working with vendors and teams to resolve issues and document configurations using Linux and networking basics.
Designs and develops hardware systems for cybersecurity and intelligence applications, working in a hybrid role at BAE Systems Digital Intelligence in Great Baddow.
Designs and debugs mixed-signal PCBs and hardware systems, including schematics, layout, bring-up, and signal integrity, using lab tools and communication protocols like I2C/SPI/UART/CAN.
Designs and develops electronic systems for advanced robotics platforms, focusing on BLDC motor control and power boards, while leading a team of engineers in Barcelona.
Develop FPGA solutions for cybersecurity and intelligence systems, implementing high-performance digital designs in demanding environments.
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