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Senior Hardware Systems Engineer
Hardware production/sustaining engineer owning the full lifecycle of GPU and CPU compute hardware for Crusoe Cloud — from prototype bring-up through large-scale production — with deep debugging of PCIe, InfiniBand, and NVMe/storage and building Python/Shell automation for hardware testing and reliability.
Hardware Board Design
Hardware board designer at NewPhotonics, a fabless semiconductor company building silicon photonic interconnect chips for AI data centers. The role involves hands-on PCB schematic capture and layout with Cadence tools, high-speed signal-integrity design up to 224 Gbps, and board bring-up, characterization, and debug.
Hardware Test and Product Engineer
Wiliot is hiring a Hardware Test and Product Engineer in Caesarea, Israel, to develop wafer-sort test programs on Teradyne UF testers, build test hardware, analyze production data, and collaborate on DFT/DFM for its IoT Pixel semiconductor products.
Hardware-Entwickler für Peiler und Empfänger (m/w/d)
Rohde & Schwarz in Memmingen seeks a hardware developer to design analog RF circuits for direction finders and receivers: component selection, circuit design and simulation (CST, AWR), and verification measurements on prototypes. Requires an EE degree, RF engineering/measurement experience, and German at C2 level.
Sr. Principal Program Manager, ASIC Design
Leads cross-functional ASIC development programs from planning through tapeout, coordinating RTL design, verification, physical design, and external partners to deliver custom silicon for AI infrastructure.
Hardware Lab Engineer
Hardware Lab Engineer at Astera Labs in San Jose sets up and maintains test environments for silicon validation of AI connectivity solutions like PCIe, CXL, and Ethernet, using high-speed test equipment and Python automation.
Principal Physical Design Engineer
Designs and optimizes physical layouts for AI connectivity ASICs using EDA tools like Cadence/Synopsys, ensuring timing closure and signoff for complex SoCs in server/storage/networking applications.
Hybrid Hardware Data & BOM PLM Engineer (Teamcenter)
Maintains and quality-checks electronic component data across a hardware development organization: manages component databases, performs BOM analysis, and supports engineering teams with component selection and qualification, ensuring data integrity in PLM systems such as Teamcenter.
Program Director - Hardware Systems (All Genders)
Program Director who owns a major hardware defence program end to end — from early R&D through production readiness — co-leading with a Chief Engineer, building and scaling a multidisciplinary engineering team, and coordinating across engineering, manufacturing, supply chain, and business functions at a defence technology company.
RTL Design Engineer (ASIC/SOC)
Leads RTL design, simulation, and verification for ASIC/SoC products: integrating and validating IP blocks, optimizing power/performance/area trade-offs, and working with backend teams through tapeout and post-Si testing. Core stack: Verilog/SystemVerilog, VCS/Verdi, AMBA APB/AXI, RISC/Arm architectures. Posted via an HR staffing agency.
FPGA Design Engineer- Cisco Silicon One
FPGA design engineer on Cisco's Silicon One team, owning FPGA development for next-gen networking and AI infrastructure hardware — from architecture and RTL design (Verilog/SystemVerilog) through synthesis, timing closure, and lab bring-up/validation, including high-speed interfaces like PCIe, Ethernet, and SerDes.
Senior Control Electronics Engineer
Designs flight-critical control electronics for hypersonic vehicles: motor controllers, actuator drivers, and mixed-signal circuits, owning PCB design through bring-up, validation, and production readiness. Tooling spans Altium, SPICE, MATLAB/Simulink, ARM MCUs, CAN, FPGA, and embedded C. On-site in Rio Rancho, NM.