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Design and verify next-gen ASICs using SystemVerilog and UVM, collaborating with architects and engineers to ensure first-pass silicon success.
SMTS Logic Design Location: Montreal, UNAVAILABLE, CA Employment Type: OTHER Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Senior Member of…
Design and develop secure hardware IPs like post-quantum crypto accelerators and random number generators using Verilog/SystemVerilog, collaborating with architects and software teams to meet security and quality standards.
Design and lead analog/mixed-signal ICs for automotive electrification and smart power, owning the full flow from spec to silicon and coaching junior engineers.
Designs high-speed memory interface chips using Verilog/SystemVerilog, working with RTL, ASIC flows, and post-silicon validation to optimize data speed and security.
Working as part of the ASIC Verification and Validation engineering team, you will create and maintain diagnostic, verification, HAL, and platform firmware running on various pre-silicon and post-silicon platforms for…
Design and optimize custom ASICs for AWS’s machine-learning servers, focusing on high-performance, power-efficient SystemVerilog RTL and trade-offs between features, power, and area.
Designs and implements ASIC chips in Verilog/SystemVerilog, closing timing/power goals and collaborating with verification and physical-design teams to bring silicon from RTL to production.
Principal Engineer designing and verifying FPGA/ASIC solutions for Rolls-Royce engine control systems using VHDL/Verilog and DO-254 standards.
Senior engineer building and improving ASIC verification infrastructure, CI/CD flows, and AI-assisted debug tools for GPU development at NVIDIA.
The application window is expected to close on: 08/20/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team Cisco Silicon One is the…
Develop and optimize AI/HPC communication middleware (MPI/SHMEM, NCCL/RCCL) for high-performance networking, integrating with RDMA transports and contributing to open-source projects.
We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from AI infrastructure and cloud computing to autonomous systems and…
We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design,…
Lead a team to design and deliver next-gen processor and SoC IP, driving RTL development, verification, and silicon execution while optimizing power, performance, and area.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Architect and optimize EDA design environments for ASIC development, own digital and analog implementation flows, configure Cadence tools, refine physical design methodologies, automate workflows with scripting and…
Claros is a power management solutions company that is innovating at the intersection of power and compute to make AI more sustainable and widely available. By driving down the cost and complexity of power delivery and…
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