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Principal Design Verification Engineer at SpaceX to develop and verify next-generation ASICs for Starlink satellites and ground infrastructure, ensuring high-performance connectivity in space and global networks.
Principal Design Verification Engineer at SpaceX designs, verifies, and validates next-generation ASICs and FPGAs for Starlink’s satellite and ground infrastructure, ensuring high-performance connectivity.
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
Designs and tests RF systems for SpaceX’s Starshield program, building scalable test infrastructure in Python/C++ and validating satellite communications hardware using lab equipment.
Designs and implements FPGAs and ASICs for SpaceX's Starlink network using Verilog/SystemVerilog, collaborating across teams to enhance satellite and ground infrastructure connectivity.
Designs and verifies next-generation FPGAs and ASICs for SpaceX’s Starshield national security programs, using Verilog/SystemVerilog, EDA tools, and collaborating with verification and physical implementation teams.
Designs and optimizes complex PCBs for SpaceX’s Starshield program, partnering with hardware engineers to build high-reliability boards for space and defense systems.
Designs and tests RF systems for SpaceX’s Starshield satellite program, focusing on communications and remote sensing in low Earth orbit using C/C++ and Python.
Develops and maintains software for SpaceX's advanced metal 3D printing systems, including controls, data acquisition, and in-situ monitoring for rocket engine manufacturing.
Designs and builds RF software for Starlink’s satellite internet system, including test automation and system validation using Python/C++ and lab equipment like spectrum analyzers.
Designs and automates RF test systems for SpaceX’s Starlink satellite network, using Python/C++ and lab equipment like spectrum analyzers and vector signal generators.
Designs and debugs Wi-Fi and RF hardware for Starlink’s satellite internet system, analyzing telemetry and logs to improve dish and router reliability.
Senior Electrical Engineer at SpaceX responsible for hardware reliability of Starlink’s satellite and ground systems, debugging PCBA failures, and improving manufacturing quality using advanced diagnostic tools.
Designs and routes complex PCBs for Starlink hardware, partnering with engineers to optimize layouts for RF, power, and digital circuits using tools like Mentor Xpedition or Altium.
Principal RF Software Engineer designs and automates test systems for satellite communications and sensing payloads, using Python/C++ and lab RF equipment to validate custom RF hardware for national security missions.
Designs and layouts printed circuit boards for Starshield’s national-security hardware, collaborating with engineers on RF, power, and high-speed digital designs using tools like Mentor Xpedition or Altium.
Design and layout advanced PCBs for SpaceX’s Starship avionics, partnering with hardware engineers to optimize high-speed, RF, and power electronics for spaceflight.
Designs complex multi-layer PCBs (20+ layers) for SpaceX’s Starship program, collaborating with hardware engineers to create high-performance electronics for space missions, including radio phased arrays and power converters. Focuses on signal integrity, manufacturability, and automation.
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