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Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: Engineering Services Group, Engineering Services Group > Mask Layout Design General Summary: Job Summary: We are looking for a…
An intern in AMD’s Singapore design center works on cutting-edge IC design tasks like analog/digital design, verification, or post-silicon validation using EDA tools such as Cadence and Synopsys, contributing to high-speed SerDes and AI-related chips.
Lead the design of high-performance power-management ICs in advanced CMOS, owning architecture, layout, and silicon validation for next-gen PMICs used in data centers and energy systems.
Designs and leads complex analog and mixed-signal integrated circuits, guiding teams from concept to production while optimizing performance for deep-submicron CMOS technologies.
Company: Qualcomm Technologies, Inc. Job Area: Engineering Services Group, Engineering Services Group > Mask Layout Design General Summary: Qualcomm is a company of inventors seeking to revolutionize the CPU market…
Designs high-speed analog transceiver circuits for graphene-based optical interconnect chips, simulating and validating power-efficient interfaces that bridge electronics and photonics.
Designs and develops cryogenic CMOS analog circuits for quantum computing control systems, collaborating with hardware and physics teams to build scalable quantum platforms.
About Oso Semiconductor Oso Semiconductor is an early-stage fabless semiconductor company developing next-generation mmWave beamforming technology. Founded by UC Berkeley PhDs, our proprietary RFIC architecture…
Designs high-speed analog/RF and SerDes architectures for optical transceiver SoCs, translating system targets into manufacturable solutions for graphene photonic interconnects.
Manage CAD flow development and ESD design methodology, integrating ESD protection into electronic designs and leading teams to ensure compliance and efficiency using tools like Cadence Virtuoso and Synopsys Primetime.
Designs and verifies RFIC and mixed-signal ASICs for a space-based 6 Tbps satellite network using Cadence Virtuoso and Spectre RF.
Role Overview We are seeking a highly experienced Senior or Staff Analog/Mixed-Signal IC Designer to join a world-class semiconductor team. The ideal candidate brings deep expertise in high-speed analog circuit…
Overview SRI’s Integrated Systems & Solutions (InSyS) Division designs leading-edge R&D technologies that power the systems end users depend on every day. From proof-of-concept to execution in the real world,…
Designs high-speed analog I/O circuits for DDR memory and chiplet interfaces using FinFET process nodes, focusing on transmitter/receiver performance and signal integrity.
Role Overview As a Sr. Staff/Principal Custom Circuit Design Engineer at Velaura AI, you will lead the architecture, design, and optimization of high-performance, low-power standard cell libraries and custom digital…
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI,…
Designs and implements photonic integrated circuits (PICs) using graphene technology, translating concepts into manufacturable chip layouts with industry-standard tools like Cadence Virtuoso and Synopsys flows.
Principal Analog Design Engineer at Allegro MicroSystems designs and verifies advanced power management ICs and motor drivers in BCD/CMOS technologies, leading innovation and mentoring teams in Musselburgh, UK.
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