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Design and implement real-time digital signal processing RTL in VHDL/SystemVerilog for Electronic Warfare and SIGINT systems, collaborating closely with RF hardware and embedded software teams.
Architect and implement digital logic embedded in power and analog ICs, owning the full flow from microarchitecture and RTL through synthesis, timing closure, DFT support, and silicon bring-up using Verilog/SystemVerilog.
Senior IP Design Verification Engineer responsible for pre-silicon verification of Silicon IPs for Bosch's Automotive Chiplet Systems using UVM/SystemVerilog, UCIe, and AXI protocols.
Role Overview We are seeking a highly experienced Senior Staff Verification Engineer to lead the design verification of next-generation high-speed interconnect IPs and SoCs. The ideal candidate will bring deep…
Designs real-time FPGA-based image processing hardware for AR/HUD systems in defense and automotive, bridging sensor data and computational optics with strict latency constraints.
Overview Microsoft is the world’s center of expertise on topological quantum computing. We are building a scaled, fault‑tolerant quantum computer grounded in topological qubits and integrated end‑to‑end with the Azure…
Design verification engineer responsible for validating advanced memory circuits (DDR4/5, LPDDR4/5) using SPICE/Verilog simulations and UVM test benches to ensure functional correctness at high speeds.
Role Overview The Arm Solutions Engineering Physical IP group is building a team focused on the development of custom and semi-custom digital hard macros used across Arm CPU, GPU, NPU, and SoC products. These hard…
Design and verify digital integrated circuits using Verilog/SystemVerilog, collaborating with cross-functional teams to implement and optimize semiconductor solutions.
The Digital IC Design Engineer will develop and refine the digital architecture for power management integrated circuits (PMICs), managing the design process from RTL to GDSII. The role involves collaborating with cross-functional teams to implement hardware, integrate ARM cores, and advance design methodologies using automation and AI tools.
The Senior Digital IC Design Engineer will architect, implement, and verify MCU/DSP systems and hardware accelerators using Verilog/SystemVerilog. The role involves leading project activities, coordinating with software teams on SDK development, and improving design methodologies.
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Design and optimize standard cell libraries and flows for Apple’s custom processors using Verilog/SystemVerilog, EDA tools, and ML-driven analysis to improve timing, power, and area.
Develops and executes pre-silicon verification strategies for ARM Cortex-M firmware controlling power management ICs, using SystemVerilog simulations to test firmware behavior, debug defects, and automate testing with Python/Perl.
About Elveo Elveo is what happens when two pioneers in direct-to-device (D2D) communications join forces. Elveo brings together a combined 20 years of expertise to close the coverage gap for more than 50 mobile network…
FPGA Design Engineer owning the design and implementation of FPGA-based interfaces (PCIe, I2C, SPI, high-speed GT) on Xilinx UltraScale+ and Versal platforms for quantum computing control systems.
Designs and implements high-performance ASIC blocks for an AI accelerator, using SystemVerilog and industry protocols like AXI and PCIe.
Salary: £100,000 - 100,000 per year Requirements: We require at least 5 years of industry experience developing FPGA-based DSP or communications systems. We require strong FPGA design experience using VHDL, Verilog, or…
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