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Req ID: 135298 Remote Position: No Region: Asia Country: Malaysia State/Province: Bayan Lepas City: Penang Summary We are seeking talented and motivated Senior Lead Engineer, Digital Design to join our dynamic and…
IDEMIA Secure Transactions, a division of IDEMIA Group, is the leading technology provider making it safer and easier to pay and connect. With unmatched expertise in cryptography and credential issuance, IST is trusted…
Who Are We? Nestled in the heartland, DICKEY-john is at the center of the agricultural marketplace. With more than 60 years of helping farmers produce higher yields to feed the world, DICKEY-john is proud of our…
Mid-Continent Instruments and Avionics is hiring a Software Engineer in Kansas to design embedded C software for safety-critical avionics products, with a focus on AHRS and INS systems using MEMS and FOG sensors. The role also involves hardware prototyping, lab testing, calibration tooling, and optional VHDL/FPGA firmware work.
Owns end-to-end security for True Anomaly's spacecraft, radios, and hardware platforms — threat modeling, PKI, secure boot, and cryptographic implementations across C/C++ flight software, embedded firmware, FPGA gateware, and RTOS. A hands-on principal-level role building security tooling, test frameworks, and validation platforms for resource-constrained embedded systems.
Staff FPGA engineer at defense technology company Anduril, developing FPGA firmware for communications and networking systems — taking MATLAB/Simulink algorithms through architecture, HDL implementation, verification, and system test on low-cost FPGAs, SoCs, and SoMs. Core stack: VHDL/Verilog, Simulink code generation, C/C++, RTOS.
Design and deliver FPGA firmware for communications and networking products at a defense technology company, translating MATLAB/Simulink algorithms into VHDL/Verilog implementations on low-cost FPGAs, SoCs and SoMs. Works across RF, DSP, firmware, software and test teams from architecture and design through verification and sustainment.
Senior FPGA Engineer designs, implements, verifies, and sustains FPGA/SoC firmware for communications and networking systems on a cross-functional RF/DSP/firmware/software team at a defense technology company. Core stack: VHDL/Verilog, MATLAB/Simulink-to-HDL code generation, C/C++, and RTOS-based embedded development.
Designs, develops, debugs, and tests embedded software and firmware in C/C++ for space and defense systems at Sidus Space. The role is 100% onsite in Cape Canaveral, working with microcontrollers, Linux systems, and FPGAs, using interfaces like SPI, I2C, UART, and CAN in collaboration with hardware engineers.
L3Harris is hiring experienced software (plus systems, electrical, and other) engineers in Melbourne, FL to work on defense tech spanning space, cyber, air, land, and sea domains. Roles require a degree with 3+ years experience (12+ for senior) and US citizenship for DoD security clearance eligibility; hiring event Oct 27.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Technical Marketing Engineer creating training, documentation, and demos for AMD’s Vivado FPGA tool suite, validating features and enabling customers through clear technical communication.
Senior C++ embedded developer at Polska Grupa Zbrojeniowa (PITRADWAR) working on IFF (friend-or-foe identification) systems for ground-to-air radar cooperation. Day-to-day involves C++/C/VHDL development on Zynq SoCs with FreeRTOS, CMake build systems, Python/TCL scripting for Xilinx tool automation, electronics debugging, and software architecture design.
Join a semiconductor product company in France building a SoC design platform (used by AMD, Intel, Samsung, Microsoft) that models complex chips and auto-generates HDL code and documentation. Day to day: develop and refactor C++/Python, work with SoC architecture and memory maps, debug and support hardware verification. Hybrid roles in Paris, Sophia Antipolis or Montigny-le-Bretonneux, €55k+.
An RTL Design Engineer defines, designs, and integrates RTL for a 5G/6G baseband subsystem made of DSP cores, hardware accelerators, DMA engines, and on-chip interconnects. Day-to-day work spans Verilog/VHDL datapath design, AXI/AHB/APB integration, PPA optimization, and Synopsys/Cadence front-end flows.
Impulse Space is hiring a Senior FPGA Engineer in Redondo Beach, CA to design, verify, and integrate high-performance digital logic for next-generation space vehicles' communication and processing systems. Day-to-day work spans VHDL/Verilog development, timing closure and multi-clock-domain design, AXI4/AXI-Stream interfaces, Xilinx/Intel-Altera toolchains, and hands-on lab debugging.
L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional…
Riverside Overview Riverside Research is an independent National Security Nonprofit dedicated to research and development in the national interest. We provide high-end technical services, research and development, and…
Owns end-to-end security for True Anomaly's spacecraft, radio, and hardware platforms — building security tooling, PKI, secure boot, and cryptographic controls (FIPS 140-3, CNSA 2.0, post-quantum) for resource-constrained embedded systems, with hands-on work across C++ flight software, embedded C firmware, and FPGA designs.
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