Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Drive the selection, qualification, and New Product Introduction of network devices for Cloudflare's global network, including hardware validation testing, automation of test plans, and cross-functional collaboration.
Architect at Alibaba's DAMO Academy building high-performance interconnect management software for large GPU clusters — the Global Fabric Manager and OpenSM subnet manager. Core work is C++ systems development on Linux around InfiniBand, RDMA, and NVIDIA NVLink/NVSwitch fabric topology, routing, and high availability.
Architect role at T-Head (Alibaba's chip unit) in Shanghai defining next-generation inter-chip network architectures for high-performance AI chips and AI super pods. Day to day: design chip-to-chip interconnect subsystems and scale-up switch silicon, write architecture specs, and drive silicon delivery with design, software, and verification teams.
R&D Computer Systems Engineer at Camtek (Migdal HaEmek, Israel) who designs, optimizes, and scales the compute infrastructure behind Camtek's products — architecting CPU/GPU/memory/storage/network designs, running Windows/Linux and virtualized environments, tuning high-performance compute clusters and networking (TCP/IP, InfiniBand, RDMA), and automating deployment, monitoring, and maintenance. No
R&D expert on Alibaba Cloud's PAI team building the inference engine for image/video generation (DiT-class AIGC models), owning generation speed, cost, model coverage, and quality. Work centers on operator fusion, graph compilation, multi-GPU parallelism, quantization, and distillation, using Python, C++, PyTorch, and CUDA/Triton.
AMAX is an IT infrastructure and engineering company that designs, customizes, manufactures, and deploys advanced computing solutions for AI, HPC, and enterprise use cases. Across servers, workstations, rack systems,…
Senior architect at a US-Israeli AI startup building custom full-stack AI servers for large-scale inference and training. Day to day: extend system-level performance simulators, model NUMA/interconnect/GPU behavior, characterize AI workloads (LLMs, GNNs), and turn architectural ideas into quantitative performance models. Core skills: performance modeling/simulation, Python/C/C++, computer architec
Architects SoC networking engines, SmartNIC/NIC designs, and interconnect fabrics for custom AI servers at a US-Israeli startup in Raanana: defining scale-up/scale-out topologies, RDMA/RoCEv2 transport offloads, and hardware acceleration of AI collective operations, collaborating across silicon, firmware, and software teams.
Architects and delivers hardware-and-software security for next-gen AI inference servers — owning the SoC hardware root of trust, secure boot, confidential computing/isolation, and threat modeling. Daily work spans C/C++, Python, and ARM assembly firmware embedded in silicon, leading cross-functional security features from emulation to deployment.
As a Product Management leader (PLM, Director, or Sr. Director level), you will own and play a hands-on role in defining and driving Xsight’s product portfolio. In this role you will identify business opportunities…
Lead ASIC design for high-speed Ethernet and AI interconnect fabrics, defining architecture and RTL for controllers, NICs, and packet processing pipelines to enable rack-scale AI infrastructure.
Leads ASIC design for AI infrastructure connectivity, focusing on Ethernet, PCIe Gen 6/7, and UALink. Sets technical direction, mentors engineers, and drives hardware/software integration for high-speed networking and AI interconnects.
Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology…
Alibaba (Hangzhou) is hiring a system software engineer to build the stack for its AI accelerators (GPU/PPU): kernel and user-mode drivers, a CUDA-compatible runtime, compiler toolchain and PyTorch integration, plus supernode topology management and performance tuning for large-scale training/inference clusters. Core tech: C/C++, Linux, CUDA, PyTorch, vLLM/Megatron.
Job Description Role Summary The Global Senior Director Medical Affairs (GDMA) position resides in the Value & Implementation (V&I) organization, which includes GMSA as well as Outcomes Research. The GDMA is a…
Crusoe is hiring a Senior Staff Software Engineer to define the multi-year architecture of its cloud storage stack for AI-scale workloads, bridging NVMe hardware with S3-competitive object stores. Expect hands-on systems programming (C/C++/Go/Rust), leading design reviews and tiger teams, and driving strategy with executive leadership.
Senior engineer in Bengaluru who partners with AI-native companies to deploy, optimize, and scale production AI systems on DigitalOcean’s AI-Native Cloud, focusing on inference, agentic workloads, and platform tooling.
Build and lead Graphcore's new SRE organization from the ground up, taking its rapidly scaling AI supercomputing platform through production launch, stabilization, and 24x7 operations. A hands-on leadership role covering incident management, SLOs, observability, and automation across Linux, networking, storage, and distributed-systems infrastructure.
Principal Network Engineer designs, maintains, and troubleshoots high-speed network fabrics for AI data centers, focusing on RDMA, InfiniBand, and 400G/800G fabrics.
Develops and maintains a high-performance communication library for AI hardware clusters using C++, Python, and parallel computing techniques.
We couldn't check your fit for this role — add a CV to your profile to see it next time.