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Application Engineer Architect (STA SignOff)
A senior field-application/architect role at Cadence driving customer adoption of its timing signoff and closure EDA portfolio (STA, ECOs, IR drop, power/timing closure) at advanced nodes (5nm/3nm and below). The person leads customer engagements, optimizes flows with Tcl/Python/Perl scripting, partners with R&D, and represents Cadence at industry forums.
Principal Application Engineer (STA - SignOff)
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a Principal Application Engineer responsible for providing pre-sales and post-sales…

PMU Analog Mixed-Signal Design Verification Engineer - Early Career (m/fd)
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our PMU team at our Munich…
Network Engineer
Tele-Consultants, Inc. (TCI) is seeking several qualified Network Engineers to support the design, development, integration, testing, evaluation, and sustainment of Submarine and Shore Network and Communications…

PMU Analog Mixed-Signal Design Verification Engineer - Experienced (m/fd)
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? As a member of our PMU team at our Munich…
FPGA Engineer IV
## **Job Details** New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have…
Silicon Physical Design CAD Engineer
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
VLSI Design Engineer
VLSI Design Engineer/Micro-architect responsible for designing cutting-edge communication systems from scratch using ASIC/FPGA with Verilog/SystemVerilog.
Analog Design, Engineer - 19173
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
ASIC Digital Design, Sr Staff Engineer- 19060
Job Description and Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning…
Senior / Staff Engineer - Digital Design
Your role Key responsibilities in your new role Perform RTL-to-gate synthesis using EDA tools such as Synopsys Design Compiler/Fusion Compiler or Cadence Genus to generate optimized gate-level netlists . Run Static…
Senior Silicon Physical Design Engineer
At SPD Technology, we bring together a team of like-minded people who are driven by the desire to bring value through their work, united in their commitment to high performance and delivering custom, cutting-edge tech…
Physical Design Intern
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative…