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Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job Description As a leading technology innovator, Qualcomm pushes the boundaries of…
Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SoCs that are used to power today’s AI workloads in datacenters all around the world. As a SoC Power Engineer, you’ll contribute to the…
Description Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SoCs that are used to power today’s AI workloads in datacenters all around the world. As a SoC Power Engineer, you’ll…
ADVANCE YOUR CAREER. ADVANCE THE WORLD.At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview We are seeking a highly motivated Synthesis Engineer/Lead to join our NPU…
Designs RTL for complex digital and mixed-signal blocks on AMD's FPGA/adaptive computing silicon programs, carrying IP from RTL development through GDS implementation. Works with Verilog/SystemVerilog, UVM verification, EDA tools (Synopsys, Cadence), and scripting (Perl, Tcl, Shell, Python) in a hybrid San Jose role.
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…
Designs next-generation CPU networking architectures for AI/ML workloads, focusing on datacenter and emerging robotics/automotive applications using Ethernet, RDMA, and die-to-die interfaces.
Lead the definition and RTL implementation of datacenter-class System IP (MMUs, interconnects, memory controllers, peripherals) for Tenstorrent's next-generation AI/RISC-V SoCs. Hands-on technical leadership in Verilog/SystemVerilog with protocols like AXI, PCIe, DDR, and USB, based hybrid in Bangalore.
Senior ASIC design methodology engineer advancing RTL development, verification, and physical implementation flows for Tenstorrent's Tensix AI compute cores — owning static analysis (Lint, CDC, RDC, DFT), logic equivalency, SDC/UPF development, and RTL-to-GDS enablement. Hybrid role based in Toronto, ON.
M9 Solutions is dedicated to providing IT services and solutions to the Federal Government by mobilizing the right people, skills, clearance levels, and technologies to help organizations that desire improved…
Leads a small front-end RTL design team in AMD's AECG IP & SoC group, owning block-level design and implementation to meet functional, timing, area, and power targets and driving blocks toward first-pass silicon success. Core work spans RTL design, verification oversight, timing/UPF constraints, quality checks like LINT and CDC, and scripting-based automation.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Overview SRI’s Integrated Systems & Solutions Division designs leading-edge R&D technologies that power the systems end users depend on every day. From proof-of-concept to execution in the real world, we…
Designs and verifies digital circuits for power systems using Verilog, RTL, and FPGA tools, while guiding junior engineers and collaborating with backend teams on synthesis and timing analysis.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Change the world. Love your job. In this position, you will be working on high-speed mixed-signal communication circuits using state-of-the art process technology, as well as be involved in the design of high…
What You'll Do We are looking for a talented and experienced Digital Design Engineer to join the Silicon One Optics Group (S1O) Digital Design Team and drive the digital design and integration of Cisco’s silicon…
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