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AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for…
Designs, develops, and secures embedded firmware for devices using C/C++, Python, Linux, and security protocols like TLS/SSL, while debugging and integrating with hardware/software teams.
## Market Data Support Engineer, Parameta Solutions (Manila)Applylocations: Manilatime type: Full timeposted on: Posted Todayjob requisition id: R5360The TP ICAP Group is a world leading provider of market…
Build and optimize Microsoft-based data infrastructure for real-time financial analytics, fraud detection, and BI systems using Azure Data Platform and Microsoft Fabric.
Build, fine-tune, and deploy large language and multimodal models for industrial use, focusing on inference efficiency and scalable deployment pipelines.
Design and develop VHDL-based FPGA firmware for high-reliability embedded systems in the defence sector, collaborating with hardware and software teams.
Design and implement advanced ASIC/SoC physical design flows for Cisco’s silicon photonics driver ICs, focusing on 100G–400G optical interconnects using tools like Cadence Innovus, Tempus, and Calibre.
Designs and develops high-performance PCB and system architectures for AI/HPC networking hardware, collaborating with cross-functional teams to bring up and qualify next-gen Fabric platforms.
Design and implement digital and mixed-signal chips for power management and automotive systems using ASIC tools, synthesis, and verification.
Designs and implements FPGA-based prototypes for ASIC validation using Verilog, high-speed interfaces, and Quartus Prime Pro, collaborating with cross-functional teams to optimize timing and debug hardware.
An intern explores AI and automation tools to improve semiconductor testchip design workflows, collaborating with engineers and documenting findings for future implementation.
Design and verify advanced chip layouts for Intel, focusing on cell/block-level layouts, floor planning, and full-chip assembly to ensure high-performance chip functionality.
Design, implement, and support software solutions for semiconductor manufacturing automation, using languages like Perl, Linux, and optionally Python or C/C++. Provide 24/7 global support and improve IT roadmaps.
【職務概要】 本職位負責 Modular IPC、Industrial PC等電腦產品之硬體研發與團隊管理，從客戶需求、產品規格定義、硬體架構規劃、電路設計、設計驗證至量產導入，主導完整產品開發流程。 我們期待此職位除了具備團隊管理與專案推動能力外，同時具備扎實的硬體實作能力，能實際參與 Schematic Design、Layout Review、系統整合與問題 Debug，並能與客戶、PM…
Design and develop ASIC hardware for Axis’s ARTPEC SoC chips, focusing on digital logic, HDLs (SystemVerilog), and EDA tools to power surveillance cameras.
Principal Physical Design Engineer leads DRAM digital design implementation from RTL to tapeout, focusing on timing closure, power integrity, and reliability while mentoring teams and driving methodology innovation.
Owns design-for-test (DFT) strategy for complex ASIC/SoC chips, implementing scan, ATPG, and test compression to maximize fault coverage and silicon yield.
Designs and optimizes ASIC physical layouts using Cadence Innovus, closing timing and power targets for complex chips.
Designs and verifies FPGA-based control logic for aerospace engine controllers and avionics, using VHDL/Verilog and tools like Xilinx Vivado.
Design engineer role building next-gen storage and memory controller SoCs, owning IO/pad-ring planning and physical-design hand-off for high-performance data-center products.
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