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Design Verification Engineer for PCIe and CXL controller IP, building testbenches and coverage plans in SystemVerilog/UVM to validate new controller features before tape-out.
Own and execute pre-silicon verification for Silicon IP (e.g., UCIe Interoperability) using UVM/System Verilog, debug failures, and guide junior engineers in ASIC/SoC verification flows.
Drive cybersecurity compliance by managing audits (ISO 27001, NIS2), interpreting regulations (DSGVO, DORA), and coordinating ISMS processes across teams.
BAUE DIE REVENUE ENGINE, DIE UNSER WACHSTUM ANTREIBT. Wir sind über 280 Menschen, sieben Standorte weltweit, ein Team und als zertifizierter Microsoft-Partner Spezialist für digitale Lösungen im Microsoft-Business…
Du begeisterst dich für Technik und Vertrieb und möchtest beides erfolgreich miteinander verbinden? Bei PCS arbeitest du an innovativen Lösungen für Zeiterfassung und Zutrittskontrolle und entwickelst dich in einem…
SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs…
Design verification engineer building and running SystemVerilog/UVM testbenches to validate DDR5, LPDDR5/6, and DFI memory interfaces for AMD’s server products.
Leads verification strategy for complex IC designs, guiding teams to build test environments, debug RTL, and improve coverage using UVM, SystemVerilog, and RISC-V protocols.
We are looking for a Chip Design DFT/Post Silicon Manager to develop the next generation DFT technologies. As a Chip Design DFT/Post Silicon Manager in the DFT team at NVIDIA, you will lead team that transfer our DFT…
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities: • Engage with customers to understand verification challenges and identify suitable…
Leads firmware development for FPGA-based systems, capturing requirements, designing and verifying hardware logic, and integrating with embedded software and PCB designs.
Design verification engineer building and running SystemVerilog/UVM testbenches for DDR5/LPDDR5 memory interfaces and DFI protocols in AMD’s server products.
Lead verification of DDR5/LPDDR5 memory interfaces for server chips using SystemVerilog, UVM, and C/C++; mentor engineers and align firmware/software with hardware features.
Design and verify next-gen FPGA devices using UVM, SystemVerilog, and AI/ML-enabled methodologies; collaborate with emulation and SoC teams.
Design and implement high-performance FPGA logic for embedded machine-vision systems, including RTL coding, simulation, and vendor selection, while collaborating with hardware and software teams.
Designs and verifies high-performance FPGA subsystems for network test and measurement hardware using Verilog/SystemVerilog and industry-standard EDA tools.
Verify CPU and SoC designs using SystemVerilog/UVM to catch bugs before silicon tape-out, collaborating with architects and RTL teams.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Senior engineer building and improving ASIC verification infrastructure, CI/CD flows, and AI-assisted debug tools for GPU development at NVIDIA.
Designs and verifies digital semiconductor IP using Verilog/System Verilog, UVM, and Python/C++; performs CDC, DFT, and static timing checks; collaborates on verification test plans.
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