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Leads a global team designing the microarchitecture and RTL for Graphcore’s AI accelerators, ensuring performance, power, and schedule targets while collaborating with architecture, physical design, and verification groups.
Designs and implements micro-architecture and RTL for AI chips, collaborating with cross-functional teams to deliver high-quality silicon solutions using SystemVerilog/VHDL and EDA tools.
Designs and integrates advanced semiconductor logic for AI chips in Bengaluru, using SystemVerilog, Python, and digital design flows to deliver RTL and microarchitecture for Graphcore’s silicon.
CAD RTL/DV Infrastructure Engineer, Sr Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
CAD RTL/DV Infrastructure Engineer, Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
Lead Engineer/ Staff – RISCV Subsystem RTL Design Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group…
RTL (NOC) Design - Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware…
RTL Design (Peripherals) - Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware…
Security RTL Design Engineer-Sr Lead/Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
Senior IP Micro-architect (RTL) - Staff/Sr Staff Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group…
RTL Design - Sr Lead Engineer Location: Noida, Uttar Pradesh, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
DSP / NPU Staff Design Verification Engineer Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
RTL Design (Infra/NOC/SMMU/DDR/Peripherals) Location: Bangalore, India Department: Hardware Engineering Work Location: onsite Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group >…
Lead the design of a next-generation edge SoC for a stealth startup, defining microarchitecture, driving PPA tradeoffs, and integrating high-performance IP to power a custom computing platform.
Designs and integrates ARM-based microcontroller subsystems for automotive applications, collaborating with cross-functional teams to deliver robust SoC solutions for modern vehicles.
Designs and verifies ASIC/FPGA chips for high-speed optical transmission systems, using VHDL/Verilog and industry tools to optimize performance and power in coherent networking hardware.
Designs and verifies ASICs and FPGAs for high-speed optical transmission systems, implementing signal processing algorithms and collaborating with global teams to optimize power and performance.
Designs and implements secure, high-performance IP blocks for Intel’s Unified Chassis, focusing on AXI/APB bridges, ECC/parity schemes, and RAS/debug telemetry for SoC reliability.
Design and verify ASICs for HP printers, leading RTL coding, verification, and silicon validation while collaborating with cross-functional teams to deliver embedded solutions.
Design FPGA/ASIC digital systems for radar, electronic warfare, and communications using Verilog/VHDL, high-speed interfaces, and PCB tools while leading teams and collaborating across engineering and business functions.
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