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Intel
5 views 3 weeks ago

E-Core CPU Design Automation Engineer

Open 17d HybridAPAC Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
Malaysia

Job Details: Job Description: E-core (formerly known as ATOM), Intel's most efficient CPU Technology team is looking for a highly motivated and technically savvy experienced individual to join our team as Design…

AI Automation Bash CAD Machine Learning +4 skills
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Intel
8 views 3 weeks ago

Data Science and Analytics - PhD Intern

Open 17d North AmericaInternshipIntern Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
United States

Job Details: Job Description: The Role and Impact Join Intel as a Data Science and Analytics Graduate Intern, where you'll dive into analyzing large datasets to uncover meaningful insights that drive business…

Agentic AI AI Analytics C++ Data Analytics +12 skills
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Intel
4 views 3 weeks ago

E-Core (Atom) CPU Layout Design Engineer

Open 17d HybridAPAC Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
Malaysia

Job Details: Job Description: As an E-Core (Atom) CPU Layout Design Engineer, you will be part of a highly skilled team responsible for the design of future generation, high-performance Intel Atom microprocessors. In…

Bash CAD Cmos Perl Tcl +1 skills
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Intel
5 views 3 weeks ago

E-Core (Atom) CPU Layout Design Engineer

Open 17d HybridAPACJunior Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
Malaysia

Job Details: Job Description: The Role and Impact: As an E-Core (Atom) CPU Layout Design Engineer, you will play a pivotal role in shaping the physical layout of Intel's cutting-edge Atom processors, contributing…

Bash Cmos IoT Perl Tcl +1 skills
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NVIDIA Backed by SequoiaBacked by SoftBank Vision Fund
7 views 3 weeks ago

Senior Full-Chip RTL Integration Engineer

Open 17d North AmericaSenior
United States

Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In…

AI Automation Bash JTAG Perl +5 skills
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NVIDIA Backed by SequoiaBacked by SoftBank Vision Fund
6 views 3 weeks ago

Senior Physical Design AI Engineer

Open 17d APACSenior
India

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial…

Agentic AI AI Automation GPU Python +1 skills
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Motorola
11 views 3 weeks ago

FPGA Design Engineer

Open 16d HybridNorth AmericaContractJunior
United States

Company Overview At Motorola Solutions, we believe that everything starts with our people. We’re a global close-knit community, united by the relentless pursuit to help keep people safer everywhere. We build and…

FPGA MATLAB Networking Python Rtl +2 skills
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Qualcomm
1 views 3 weeks ago

NPU Design implementation (Synthesis) Principal/Manager

On-siteAPACPrincipal
India

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and…

AI Asic Automation Perl Python +3 skills
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careers.nordicsemi.com
2 views 3 weeks ago

ASIC RTL Design Engineer

UK
United Kingdom

About the job As a ASIC RTL Design Engineer at Nordic Semiconductor, you will play an important role in developing the next generation of cutting-edge Wi-Fi SoCs that power connected devices around the world. You will…

FPGA Linux Prototyping Python Rtl +4 skills
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Advanced Micro Devices, Inc
11 views 3 weeks ago

CPU RTL Design Engineer

Open 18d North America
United States

AMD is hiring a CPU Core RTL Design Engineer in Austin, TX to design and optimize RTL for next-generation high-performance processor cores (load/store, decode, and other core subsystems) across client, server, and AI platforms. The role centers on Verilog/SystemVerilog RTL development, microarchitecture definition, and collaboration with architecture, verification, and physical design teams throug

AI Python Rtl SystemVerilog Tcl +1 skills
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Toporder
2 views 3 weeks ago

Technicien Support H/F

Europe
France

Rejoins Toporder by myPOS et accompagne les commerçants dans leur quotidien Toporder est une plateforme qui accompagne les commerçants dans leur digitalisation — gestion des commandes, expérience client et pilotage de…

Tcl
Apple Backed by Sequoia
3 views 3 weeks ago

RFIC Test Engineer

Open 127d North America
United States

Engineer on Apple's wireless RFIC team in San Diego who tests, debugs, and measures RF transceiver SoC IP used in wearable products, using RF test equipment (network/spectrum/vector signal analyzers and generators) plus scripting in Python, Perl, TCL, or C++.

C++ Perl Python Tcl
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Astera Labs
10 views 3 weeks ago

SoC Design Director

Open 118d APAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.Canada LMIA employer — This employer was issued a positive Labour Market Impact Assessment by Employment and Social Development Canada in the last four quarters, through the High Wage, Global Talent or Permanent Resident streams. The approval belongs to the employer and is not a commitment to sponsor this role.
India

Leads SoC design for high-performance connectivity chips, owning RTL, synthesis, timing closure, and pre/post-silicon debug at advanced process nodes using Synopsys/Cadence tools.

AI Asic Ethernet Firmware Machine Learning +11 skills
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Tensordyne
12 views 3 weeks ago

System Software/Embedded Engineer (Diagnostics)

Open 130d On-siteNorth AmericaContract
United States

Develops low-level system software and diagnostics for high-performance AI inference hardware, including firmware, drivers, and Linux kernel modules, with a focus on manufacturing test integration and hardware/software co-design.

AI Bash C++ Embedded Linux Embedded Software +12 skills
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quantummotion
6 views 3 weeks ago

Senior Digital IC Design Engineer

Open 18d UKSenior
United Kingdom

Senior digital IC design engineer at Quantum Motion (London) designing ultra-low-power cryogenic CMOS control chips for silicon-based quantum processors. The role owns the full digital design cycle: microarchitecture, RTL in Verilog/SystemVerilog, AMS co-simulation, physical implementation, low-power synthesis, STA and tape-out signoff.

Automation Cadence Virtuoso Cmos Python SerDes +3 skills
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Advanced Micro Devices, Inc
17 views 3 weeks ago

Summer 2027 Hardware Engineer Intern

Open 18d UKInternshipIntern
United Kingdom

A Summer 2027 hardware engineering internship at AMD in Cambridge, UK (full-time, hybrid or onsite, July 1 – September 24, 2027). The intern collaborates on AMD's discrete and embedded hardware products and builds applications and large-scale automation systems for the hardware organization, drawing on skills like logic design, Verilog/VHDL, and scripting.

AI Asic Automation C++ GPU +8 skills
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Evollabs
7 views 3 weeks ago

DevOps (ASIC EDA Flow Specialist)

Open 18d MENAFull-time
United Arab Emirates

Architect, build, and maintain ASIC EDA design flows and infrastructure for Evollabs' AI chip development in Dubai — managing EDA tool installations/licensing, compute grids, storage, Git-based CI/CD, and IP integration from RTL to GDS. Core stack: Synopsys/Cadence/Mentor EDA tools, Tcl/Python/Shell scripting, FlexLM/RLM/SCL license servers, and LSF/SLURM/Grid Engine.

AI Asic Automation Bash Bazel +12 skills
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Google Backed by Sequoia
5 views 3 weeks ago

Senior Silicon Physical Design Engineer, Google Cloud

Open 18d APACSenior Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.Denmark Fast-track company — This company is certified by SIRI for the Danish Fast-track scheme for hiring foreign skilled workers. The certification belongs to the employer and is not a commitment to sponsor this role.
India

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…

AI Asic Cloud GCP Networking +3 skills
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Renesas Electronics
8 views 3 weeks ago

Sr. Staff Engineer - Physical Design

Open 18d APACStaff
India

We are seeking an experienced and highly technical Backend Physical Design Engineer to drive the physical implementation of our next-generation, high-performance SoCs. You will own the complete RTL-to-GDSII flow,…

Agile IoT Perl Python Signal Integrity +1 skills
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Terra Quantum
9 views 3 weeks ago

Senior FPGA Developer (SystemVerilog)

Open 124d HybridEuropeSenior
Germany

The Role The Senior FPGA Developer will be a member of the core team building the Quantum Key Distribution system. The focus is end ‑ to ‑ end RTL ownership on AMD/Xilinx (Artix ‑ 7, Kintex UltraScale): architect,…

Automation Cloud Ethernet FPGA GitHub +8 skills
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