Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
We are seeking a dedicated FPGA Digital Design Engineer to join our team. The FPGA Digital Design Engineer will be responsible for designing and implementing digital algorithms and systems processing. This role…
Electrical Design Engineer (m/f/d) Would you like to turn complex subsea challenges into robust, real‑time software solutions? Are you looking for a place where you can grow your skills in embedded software development…
The RF Hardware Engineer will lead the design, development, and integration of custom radio and RF hardware for national security missions. The role involves the full development lifecycle, including circuit design, FPGA integration, and RF characterization using laboratory test equipment.
Обязанности: разработка алгоритмов и их реализация и оптимизация на ПЛИС с помощью языка Verilog, а также разработка модулей тестирования для них; откладка модулей с использованием Xilinx ChipScope моделирование…
Designs and develops complex ASIC modules for high-performance networking chips, focusing on architecture, RTL implementation, verification, and power/performance optimization. Leads cross-functional teams and mentors junior engineers.
Designs and implements large SoC physical layouts from RTL to GDSII, including floorplanning, place & route, power grids, and sign-off verification for high-performance chips.
The ASIC Design Engineer will develop high-speed networking chips from specification to netlist, working on micro-architecture, RTL implementation, and timing closure. The role involves collaborating with verification and physical design teams to ensure high-performance silicon for networking hardware.
Design high-speed networking ASICs from spec to netlist using Verilog/SystemVerilog, work with physical design for timing closure, and collaborate with verification teams.
This role involves the design, development, and integration of analog circuit blocks for Flash-IP and analog compute-in-memory technology to support AI inference. The engineer will simulate and validate analog circuits while collaborating with cross-functional teams to ensure performance and reliability.
SyoSil is hiring ASIC/FPGA design and verification engineers to work on RF radio ASIC projects using SystemVerilog and UVM. The role involves full-cycle IP block development, from architecture to verification, within a collaborative, SCRUM-based international team.
Design, implement, and verify digital integrated circuits and subsystems using RTL (Verilog/SystemVerilog) in a cross-functional semiconductor engineering team at Analog Devices in San Jose.
Designs and implements high-speed ASIC interconnect silicon, writing RTL and firmware to control analog blocks and ensure hardware-software integration through synthesis, emulation, and silicon bring-up.
The FPGA/Hardware Engineer will design, develop, and verify complex FPGA-based hardware systems for aerospace and avionics applications. The role requires expertise in RTL design, System Verilog/UVM, and hardware validation within regulated environments.
RTL design and integration engineer on AMD's FPGA product team, driving silicon implementation using Verilog/SystemVerilog, EDA tools, and scripting automation.
Designs and tests analog/mixed-signal integrated circuits for brain-machine interfaces, focusing on low-power, compact solutions using advanced CMOS FinFET technologies.
RTL Design Engineer developing TPU (Tensor Processing Unit) silicon for AI/ML hardware acceleration, using Verilog/SystemVerilog to design and verify ASIC blocks.
Develop embedded C/C++ software for laser-communication ground stations, integrating RTOS/Linux with FPGA and high-speed networking to control and automate optical data links.
Architect and implement digital logic embedded in power and analog ICs, owning the full flow from microarchitecture and RTL through synthesis, timing closure, DFT support, and silicon bring-up using Verilog/SystemVerilog.
Senior IP Design Verification Engineer responsible for pre-silicon verification of Silicon IPs for Bosch's Automotive Chiplet Systems using UVM/SystemVerilog, UCIe, and AXI protocols.
Investigates and reverse-engineers hardware and software systems for legal and business disputes, such as patent litigation or trade secrets, using programming, electrical engineering, and embedded systems expertise.
We couldn't check your fit for this role — add a CV to your profile to see it next time.