Digital IC Design Co-op (Winter/Spring 2027)
Summary
A six-month onsite engineering co-op (January–June 2027) at Skyworks Solutions in Cedar Rapids, IA, where a student works alongside digital, verification, and RF engineers on digital IC blocks for RF front-end modules — writing RTL (VHDL/Verilog/SystemVerilog), simulating with Cadence Xcelium/Synopsys VCS, building Python automation, and supporting lab testing.
Description
As a Digital Integrated Circuit (IC) Engineering Co Op, you will work closely with digital design engineers, verification engineers, layout designers, and product/test engineering teams to help develop the digital subsystems that support our industry leading RF front end modules. Work activities will include RTL coding, simulation, verification, development of production test vectors, Python based automation, lab testing, documentation, and participation in design reviews.
You will gain exposure to how digital design is executed in industry, build advanced technical knowledge, develop valuable hands on skills, and explore future full time opportunities within Skyworks. We are excited to have you as part of our team and to support your professional growth while you contribute to our success!
Responsibilities
In this role, your responsibilities will include but are not limited to the following:
• Work with experienced engineers to design and develop digital IC blocks for multi chip modules
• Create and modify RTL (VHDL, Verilog, or SystemVerilog) for digital subsystems
• Run simulations using tools such as Cadence Xcelium or Synopsys VCS
• Develop and execute Python based verification scripts for automation, regression, and data analysis
• Assist in generating production test vectors and supporting digital oriented final test
• Participate in design and code reviews, presenting results and design intent
• Support lab evaluation and debug using oscilloscopes, logic analyzers, and digital pattern generators
• Troubleshoot and resolve RTL, simulation, or verification issues
• Collaborate with other digital, analog, RF, product, and test engineers
• Help maintain or enhance simple internal web based design tracking tools (HTML/JavaScript)
Required Experience and Skills
• Currently enrolled in an Electrical Engineering, Computer Engineering, or related BS, MS, or PhD program
• Commitment to work onsite for 6 months (January – June 2027)
• Strong desire to learn, grow, and make an impact
• Strong career interest in digital IC design, verification, and RTL development
• Willing to share knowledge and collaborate with others
• Must have experience with Microsoft Word, Excel, PowerPoint, and Outlook
• Experience with VHDL or Verilog RTL coding is highly preferred
• Experience with Python for verification or automation is a strong plus
• Exposure to EDA tools such as Cadence Xcelium, Genus, Innovus, or equivalent digital design tools is helpful
• Exposure to lab tools such as oscilloscopes, logic analyzers, pattern generators, etc