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Architect and implement digital logic embedded in power and analog ICs, owning the full flow from microarchitecture and RTL through synthesis, timing closure, DFT support, and silicon bring-up using Verilog/SystemVerilog.
Senior IP Design Verification Engineer responsible for pre-silicon verification of Silicon IPs for Bosch's Automotive Chiplet Systems using UVM/SystemVerilog, UCIe, and AXI protocols.
Investigates and reverse-engineers hardware and software systems for legal and business disputes, such as patent litigation or trade secrets, using programming, electrical engineering, and embedded systems expertise.
Develops memory controller firmware for AI, ML, supercomputing, and graphics accelerators in data centers, collaborating with RTL design, DV, emulation, platform, and software teams.
Overview Microsoft is the world’s center of expertise on topological quantum computing. We are building a scaled, fault‑tolerant quantum computer grounded in topological qubits and integrated end‑to‑end with the Azure…
CPU Physical Design Engineer performing full physical design implementation from RTL to GDSII—synthesis, placement, routing, clock tree synthesis, timing/power analysis, and signoff—using Synopsys and Cadence EDA tools on high-performance Intel CPUs.
Design verification engineer responsible for validating advanced memory circuits (DDR4/5, LPDDR4/5) using SPICE/Verilog simulations and UVM test benches to ensure functional correctness at high speeds.
The FPGA Design Engineer will develop and maintain FPGA designs, core system software, and drivers for new and existing products. The role involves the full development lifecycle, including requirements analysis, RTL design, verification using VHDL, and DSP software development in C.
Role Overview The Arm Solutions Engineering Physical IP group is building a team focused on the development of custom and semi-custom digital hard macros used across Arm CPU, GPU, NPU, and SoC products. These hard…
Design and verify digital integrated circuits using Verilog/SystemVerilog, collaborating with cross-functional teams to implement and optimize semiconductor solutions.
The Digital IC Design Engineer will develop and refine the digital architecture for power management integrated circuits (PMICs), managing the design process from RTL to GDSII. The role involves collaborating with cross-functional teams to implement hardware, integrate ARM cores, and advance design methodologies using automation and AI tools.
The Senior Digital IC Design Engineer will architect, implement, and verify MCU/DSP systems and hardware accelerators using Verilog/SystemVerilog. The role involves leading project activities, coordinating with software teams on SDK development, and improving design methodologies.
Обязанности: Разработка, тестирование, отладка и сопровождение в производстве блоков обработки радиолокационной информации. Требования: Опыт работы от 3 лет (контроллеры, разработка ПО для встраиваемых систем и систем…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Hardware engineering intern/co-op at AMD contributing to discrete and embedded hardware products, building internal tools, and learning ASIC design and verification workflows.
An undergraduate hardware engineering intern/co-op collaborates with engineers to develop and improve AMD’s discrete and embedded hardware products, working on applications and large-scale systems for internal and external use.
An undergraduate intern/co-op for hardware design verification at AMD, focusing on testing and debugging AI-related hardware projects using Verilog/SystemVerilog, Python, Perl, and other tools to ensure performance and reliability.
An intern/co-op verifying AMD’s AI hardware designs by writing test scripts, debugging, and validating hardware/software integration for next-gen machine intelligence products.
An undergrad co-op/intern develops and executes verification test plans for AMD’s AI hardware, writing scripts (Python/Perl) and debugging Verilog/SystemVerilog models to ensure high-end machine intelligence products meet performance and reliability standards.
Intern/co-op role verifying hardware designs for AMD’s high-end AI processors, writing test scripts in Python/Perl, and debugging Verilog/SystemVerilog models.
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