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2.2K jobs
Weekday AI
1 views 4 weeks ago

Physical Design Engineer

Open 25d APACFull-time
India

Designs and optimizes the physical layout of AI hardware chips, ensuring performance, power, and area constraints are met.

Automation Perl Process Improvement Python Tcl
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Weekday AI
1 views 4 weeks ago

Physical Design

Open 25d APACFull-time
India

Designs and optimizes the physical layout of AI hardware components for performance and efficiency.

AI HPC Machine Learning Networking Perl +2 skills
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Weekday AI
3 views 4 weeks ago

ASIC RTL Design Engineer

Open 25d APACFull-time
India

Designs and implements RTL for AI accelerators and ASICs, optimizing for performance and power efficiency.

Asic Automation Perl Python Rtl +3 skills
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Weekday AI
1 views 4 weeks ago

Pre-Silicon Validation Engineer

Open 25d APACFull-time
India

Pre-Silicon Validation Engineer Location: India Department: Weekday's Client via platform Workplace: remote Employment Type: full Description This role is for one of the Weekday's clients Min Experience: 6+…

AI Bash C++ Embedded Software Ethernet +13 skills
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Weekday AI
1 views 4 weeks ago

Design Verification Engineer

Open 25d APACFull-time
India

Design Verification Engineer at Weekday AI: builds and validates AI hardware designs to ensure correctness and performance before tape-out.

Automation Firmware Perl Python Rtl +4 skills
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Talan Group
3 views 4 weeks ago

Ingénieur DevOps F/H

Open 25d Europe
France

Build and maintain CI/CD pipelines, automate deployments, and improve DevOps practices for data-heavy search and analytics platforms using Linux/Windows, Jenkins/GitLab CI, Ansible, Terraform, and Kubernetes.

Analytics Ansible AWS Azure Bash +23 skills
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Infinite Orbits
3 views 4 weeks ago

Electronics and Data System Engineer

Open 25d Europe
France

Established in 2017, Infinite Orbits is a NewSpace company, based in Toulouse, pushing the boundaries of in-orbit services with cutting-edge spacecraft driven by its own Rendez-Vous solution, an advanced Autonomous…

Assembly Automation Ethernet Python Tcl
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Cadence Backed by Y Combinator
2 views 4 weeks ago

Application Engineer I: Systems Verification - Emulation

Open 24d LATAM
Brazil

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems Inc. is looking for a motivated Application Engineer I: Systems Verification -…

Bash Cloud C++ Embedded Software FPGA +10 skills
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Ciena
2 views 4 weeks ago

ASIC/FPGA Design Engineer

Open 24d APAC
India

Design and verify ASIC/FPGA logic for high-speed networking hardware using Verilog/SystemVerilog, and collaborate on bring-up and validation.

Ethernet FPGA I2c Networking PCIe +5 skills
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AssetWorks
4 weeks ago

Senior Application Engineer

Open 24d HybridNorth AmericaFull-timeSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Job Summary: ASSET InterTech creates software (ScanWorks BST) that tests hardware. We are seeking a Senior Applications Engineer with deep expertise in both hardware and software to lead technical support initiatives…

Automation CAD Embedded Systems Itar JTAG +4 skills
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Silicon Labs
3 views 4 weeks ago

Staff Engineer - IC Design

Open 24d APACStaff
India

Designs and implements reusable digital IP blocks (Verilog/SystemVerilog) for low-power wireless SoCs, focusing on PPA targets and AMBA/peripheral IP like SPI, UART, and DMA.

AI I2c Perl Python Rtl +4 skills
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Silicon Labs
3 views 4 weeks ago

Lead Engineer – IC Design (STA Lead )

Open 24d APACLead
India

Lead a team to implement and sign off on timing constraints, synthesis, and static timing analysis for high-performance SoCs and ASICs using Cadence or Synopsys EDA tools.

Automation Perl Python Tcl
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Silicon Labs
3 views 4 weeks ago

Manager / Senior Manager – Design Verification

Open 24d APACSenior
India

Lead a team to verify low-power wireless SoC designs using SystemVerilog/UVM, ensuring robust IP and chip-level functionality across global projects.

AI Analytics Automation Data Analytics Firmware +10 skills
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ARM
3 views 4 weeks ago

SOC Design Engineer

Open 24d HybridUK
United Kingdom

Designs and verifies System-on-Chip (SoC) subsystems using Verilog/SystemVerilog, integrating high-speed IPs like PCIe and DDR, and collaborating with verification and backend teams.

Accessibility Assembly Bash C++ Ethernet +7 skills
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Intel
2 views 4 weeks ago

Intel Process Integration Engineer - (FE)

Open 24d North AmericaInternshipIntern
United States

Job Details: Job Description: Join Intel and build a better tomorrow. What we do: The Intel Foundry MDCE and Logic Technology development (LTD) organizations delivers process technology innovation to drive Intel's…

Automation Cmos C++ MATLAB Python +3 skills
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NVIDIA
2 views 4 weeks ago

Emulation Front-End Infrastructure Engineer

Open 24d North America
United States

Engineer scalable compilation and synthesis flows for NVIDIA’s hardware emulation platforms, using EDA tools like Synopsys and Cadence to validate complex chip designs before fabrication.

AI Automation Bash Git LLM +7 skills
168K – 265K $
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Micron Technology
3 views 4 weeks ago

Intern - DRAM IP Circuits Design Engineer

Open 24d APAC, North AmericaInternshipIntern

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…

Agentic AI AI Automation Cmos Generative AI +6 skills
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Synopsys
4 weeks ago

PCIe Digital Design, Sr Staff Engineer-18307

Staff

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…

AI Automation Bash Iso 26262 PCIe +6 skills
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Amazon
2 views 4 weeks ago

Chip Design Integration Lead

Open 25d MENALead
Israel

Lead the end-to-end integration of high-performance networking SoCs for AWS Nitro, defining IP blocks, resolving CDC/RDC issues, and driving synthesis/timing closure with Verilog/SystemVerilog and scripting.

AI Automation AWS Bash Cloud +10 skills
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Axiado
5 views 4 weeks ago

Senior Physical Design Engineer

Open 26d APACSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
India

Leads ASIC physical design from RTL to tapeout, defining floorplans, power plans, and timing closure while ensuring signoff quality for secure AI hardware.

AI Automation CAD Cloud Python +2 skills
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