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Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
Designs and optimizes digital circuits for ASICs/ICs, ensuring low power, performance, and compliance while collaborating with analog and test teams.
Lead a team to design, develop, and deliver FPGA/ASIC solutions for avionics systems, using Verilog/SystemVerilog, Xilinx Vivado/Intel Quartus, and adhering to DO-254 standards.
Designs and models high-performance hardware for AI inference, focusing on LLMs and NVIDIA's LPU architecture using C++ and chip design concepts.
Senior Software Engineer at NVIDIA designing and developing tools for RTL generation and automated workflows in C++, with a focus on ASIC design and Verilog RTL for GPU and AI hardware.
Leads a team of RTL design engineers to architect and develop semiconductor IP and subsystems, focusing on front-end design, verification, and PPA optimization using Verilog/SystemVerilog/VHDL.
Senior engineer designing and integrating high-performance System-on-Chip (SOC) components for NVIDIA’s next-gen GPUs, using RTL design, automation, and scripting to streamline chip development.
Develops formal verification IP for hardware design using Verilog and SystemVerilog Assertions, focusing on industry-standard bus protocols like AXI or PCIe.
Designs, verifies, and implements RTL for power management ICs and SoCs, collaborating with architects and verification teams to deliver high-performance semiconductor solutions.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…
Leads a global team to architect, design, and deliver complex multi-chiplet System-on-Chip (SoC) designs for enterprise and AI infrastructure, using RTL coding, IP integration, and verification flows.
Designs and implements digital ASICs for scientific instruments, focusing on low-power, radiation-aware systems for particle detectors and high-energy physics applications using SystemVerilog/Verilog and EDA tools.
Designs and optimizes custom silicon hardware components for Google's products, focusing on performance, power efficiency, and integration using RTL and Verilog.
Designs and implements PCI Express IP blocks in Verilog/SystemVerilog for AMD’s server, client, GPU, and semi-custom chips, collaborating across RTL, verification, and post-silicon bring-up.
Designs and implements digital logic and IP for AI chips or SoCs using Verilog/SystemVerilog, verifies functionality, and integrates IP into larger systems with front-end design flows.
Role Overview As a DFT Architect/Manager/Sr. Manager at Velaura AI, you will lead the definition, implementation, and execution of Design-for-Test strategies for next-generation AI and high-performance computing…
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
The application window is expected to close on: 09/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This position requires that you live…
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