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Contexte Le département « Digital HW/SoC (System on Chip) » de l’unité de produit « Secure Connected Edge » basé à Valbonne recrute un stagiaire de fin d'études pour une durée de 6 mois afin de contribuer au…
Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across…
Senior Methodologist for AIML Enhanced Design/VerificationThis role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the…
Business Unit: Cubic Defense Company Details: When you join Cubic, you become part of a company that creates and delivers technology solutions in transportation to make people’s lives easier by simplifying their daily…
Job Title: Senior Digital Design Engineer Role Summary: Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications.…
ASIC Front-end Design engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Senior verification engineer owning verification of complex digital blocks and major features in power management SoCs — developing SystemVerilog/UVM environments, driving coverage closure, debugging RTL and regression failures, and automating verification flows for AI, datacenter, and networking power applications.
Designs high-performance Network-on-Chip components for Microsoft’s AI System on Chip (AISoC) using Verilog/SystemVerilog, synthesis, and SoC integration in a cloud infrastructure environment.
Physical Design Engineer on OpenAI's Hardware team, owning block-level physical implementation of next-generation AI accelerator silicon from floorplanning to signoff. Day to day involves building physical design tools/flows, optimizing power-performance-area trade-offs, and collaborating with RTL designers, EDA vendors, and ASIC partners using Python, Bazel, and TCL.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
About Us : AI compute is hitting a hard physical wall, and memory bottlenecks are throttling the entire industry. Founded in October 2024 and backed by €57M in funding, Vertical Compute is solving this with proprietary…
At Apple, we work every single day to craft products that enrich people's lives. The people here at Apple don't just build products - they create the kind of wonder that revolutionizes entire industries. We…
Renesas has a growing presence in India with HC approaching 1000+ and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India). With the growing importance…
Design and deliver high-performance digital subsystems within mixed-signal ICs, owning the full flow from RTL design through synthesis, P&R, and tape-out using Verilog/SystemVerilog and industry EDA toolchains.
We are seeking a Senior Staff Digital Design Engineer to architect and implement the digital content within power, analog, and mixed-signal IC products. This is a senior individual-contributor role requiring ownership…
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