Tech jobs

North AmericaInternshipIntern

Software Engineer - Intern

Canada

Job Details: Job Description: Altera is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. Do you love to solve…

Analytics CAD C++ Data Analytics Deep Learning +4 skills

Persimmons

Senior ASIC Design Verification Engineer (AI Compute)

North AmericaSenior

Agentic AI AI Asic Automation C++ +7 skills

Who we are Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds of semiconductors, AI systems, and software innovation, we're on a…

tangramflex

Radio Frequency Software Engineer

HybridNorth America

C++ Data Pipelines Embedded Software Embedded Systems Firmware +11 skills

Software Engineer – RF/DSP | Shape the Future of Electronic Warfare Build Real Systems That Matter Are you ready to move beyond simulations and build real-world RF sensing systems that protect our nation? We're looking…

Qualcomm

On-siteNorth AmericaStaff H-1B sponsor history

FPGA Design & Firmware Engineer, Staff

Agile AI Asic Automation CAD +23 skills

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what is possible to enable…

Lattice Semiconductor

C++ Embedded Linux Embedded Software Embedded Systems FPGA +6 skills

Staff Embedded Software Engineer

APACStaff

China

Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.…

緯穎科技服務股份有限公司

EHE-CPLD/FPGA工程師

【工作內容】 1. 數位電路邏輯控制程式設計 2. 基本通訊界面控制 (UART/I2C/SPGIO/SPI) 3. CPLD規格評估 4. CPLD規格書規劃、撰寫、維護 5. Verilog/VHDL模擬除錯設計 6. CPLD測試、除錯、驗證及最佳化 7. 維護現有CPLD專案【其他條件&加分項目】 1. 熟悉 Verilog, 2. 若具有 Altera Quartus II, Lattice Diamond ,…

I2c UART Verilog

美商達爾國際有限公司台灣分公司

Firmware Engineer

Job Responsibility: Hardware application circuit design. FPGA firmware design. MCU firmware design. Qualifications: MCU firmware design tools. 示波器操作. 邏輯分析儀操作. 電子零件焊接. Certification: FPGA 系統晶片電路設計, Verilog 程式化語言設計

Firmware FPGA Verilog

臺灣發展軟體科技股份有限公司

資深數位IC設計工程師 ( Sr. Digital IC Design Engineer )

APACFull-timeSenior

AI FPGA LLM Machine Learning PCIe +2 skills

✅ About the job We are seeking an experienced Sr. Digital IC Design Engineer for Next IP and Next SoC development. ✅ Key Responsibilities ●Responsible for LLM inference accelerator RTL design, simulation, verification…

臺灣發展軟體科技股份有限公司

設計驗證工程師 (Design Verification Engineer)

PCIe Python Tcl Uvm Verilog

✅ About the job Responsible for SoC-level/IP-level environment verification to ensure the circuit architecture and functional behavior align with design specifications. ✅ Key Responsibilities 1. Verify designs with…

奇景光電股份有限公司

數位IC設計工程師(台南)

Advanced Micro Devices, Inc

1. ARM based SoC integration相關規畫或協助 2. 具AMBA (AHB/APB/AXI) 介面之SoC周邊IP開發. 3. Familiar with digital logic design and verilog RTL coding. 4. 有國內外出差需求

Rtl Verilog

RTL Methodology Silicon Design Engineer

North America

Agentic AI AI Automation Bash C# +11 skills

Builds and owns the methodology, tooling, and AI-powered workflows used by every designer on AMD's next-generation CPU core RTL team — including LLM-based assistants, linting/static-analysis flows, and SystemVerilog parsing and code-analysis tools — collaborating with verification, physical design, and post-silicon teams.

Credo Technology Group

Digital Design Engineer

On-siteNorth America

AI Analytics Asic Bash Ethernet +9 skills

Front-end ASIC design engineer at Credo Technology Group who architects, implements, and verifies complex logic blocks for high-speed connectivity chips, supporting integration tasks (Lint, CDC, synthesis, ECO) through tape-out. Core technologies: Verilog/SystemVerilog RTL design and verification, UVM, and scripting in Python, Tcl, Perl, and shell.

80K – 133K $

GLOBALFOUNDRIES US Inc.

Sr Manager/Deputy Director - IP Engineering

On-siteAPACSenior

Automation C++ Perl Python Rtl +4 skills

About GlobalFoundries GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology…

GLOBALFOUNDRIES US Inc.

Senior Member of the Technical Staff

On-siteAPACSenior

Assembly Automation CI/CD C++ Perl +7 skills

Senior technical lead role in GlobalFoundries' IP Engineering team in Hsinchu, Taiwan, driving development and delivery of high-performance compute processor IP — from architecture and microarchitecture through RTL design, UVM/formal verification, and signoff — while mentoring engineers and leading execution across global multi-site teams using SystemVerilog, C/C++, Python, and EDA toolchains.

Movandi

Automation Bash C++ Embedded Software Ethernet +16 skills

Digital Design Engineer (Mid-Senior Level)

On-siteMENASenior

Saudi Arabia

Movandi, a 5G mmWave technology company, is hiring a Digital Design Engineer in Riyadh to own complex digital subsystems: leading RTL design and verification for FPGA/ASIC targets, driving microarchitecture and timing closure, and doing lab bring-up and debug. Core tools include SystemVerilog/VHDL, cocotb, Vivado, Cadence Genus/Innovus/Xcelium, Python/Tcl, and Git.

Movandi

C++ Firmware FPGA Microcontrollers Oscilloscope +2 skills

Senior Wireless Systems Design & Integration Engineer

On-siteMENASenior

Senior engineer at Movandi designing and integrating 5G millimeter-wave communication systems: developing PHY-layer algorithms, running RF/link-budget analysis, and leading system-level integration, lab and OTA testing across chipsets, FPGAs, and microcontrollers. Core tech: C/C++, Python, Verilog/FPGA, mmWave beamforming.

Apple

SOC Design Verification Engineer

North America

AI Assembly Bluetooth C++ Firmware +9 skills

Verifies Apple's next-generation wireless SOC silicon: owns pre-silicon RTL verification from test planning through coverage closure and signoff, building reusable SystemVerilog/UVM testbenches across blocks like the CPU subsystem, PCIe, DMA, and MAC-PHY, including low-power/UPF verification and exploring AI-assisted verification workflows.

Microsoft

On-siteNorth AmericaFull-timeSenior

Senior Design Verification Engineer - Fabric Interconnect

AI Automation Azure Cloud Generative AI +6 skills

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( SCHIE ) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…

IonQ