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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
Designs and optimizes advanced ASIC/SOC chips for SpaceX's Starlink satellites and ground systems, focusing on physical implementation, timing closure, and verification using EDA tools.
Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
Designs and implements advanced ASIC/SOC chips for SpaceX’s Starlink network, focusing on physical design flows, timing closure, and signoff checks to enable global satellite internet connectivity.
Principal Digital Design Engineer (ASIC/FPGA)
Principal engineer leads a small team designing high-performance FPGA/ASIC Front Haul Gateway solutions for cellular infrastructure radios, using Verilog, SystemVerilog, and AMD Vivado tooling.
Design for Test Intern (m/f/d)
An internship at Apple in Munich writing software to improve hardware verification on upcoming Apple hardware products, combining traditional automation and EDA tools with emerging AI/ML techniques to build next-generation verification flows.
Physical Design Engineer - Synth, Senior
Role Overview We're looking for a Senior Physical Design Engineer - Synth to own synthesis, timing convergence, and implementation readiness for key partitions across our AI accelerator roadmap. This is a hands-on…
ASIC Physical Design Engineer - DFT, Senior
Role Overview As Senior DFT Engineer, you'll own DFT implementation end-to-end: defining the DFT micro-architecture for our accelerators, developing and integrating it into internal RTL and third-party IP, driving…
Product Application Engineer - FPGA/Emulation & ACAP Compilation Tools
Develops and supports FPGA/emulation and ACAP compilation tools for AMD's hardware platforms, collaborating with R&D and customers to improve emulation flows and prototyping methodologies.
Lead Design Verification Engineer – High‑Speed Interface Protocols
We are seeking a Design Verification Engineer to lead subsystem and IP‑level functional verification of high‑speed interface protocol blocks in our AI chips. You will guide a team of highly skilled verification…
Staff/Senior Engineer- Mask Design (Analog Layout)
Looking for an experienced Analog Layout Design Engineer to join the 2.6B$ Power Business Unit where in the candidate will get to work on a wide range of exciting products such as Controllers, Drivers, DC-DC converters…
FPGA engineer
We produce and maintain turbomachinery systems for aircrafts. Product development is focused on light weight and high speed electric compressors. Such compressors comprise three major items, i.e. electric compressors,…
FPGA Design Engineer
FPGA Design Engineer Raleigh, NC As a Firmware Engineer, you will play an active role in every phase of the FPGA development cycle, including the design, installation, and troubleshooting of the firmware used to design…
Firmware Design Engineer
Hidden Level is hiring an onsite Firmware Design Engineer in Syracuse, NY to architect, simulate, and test FPGA digital logic (VHDL/Verilog on AMD Zynq UltraScale+ RFSoCs) for its RF sensing systems, spanning data acquisition, signal processing, hardware control, and high-speed interfaces like Ethernet and PCIe.
Staff Design Verification Engineer
We are seeking an experienced Staff ASIC/SoC Verification Engineer to join our dynamic and fast‑paced engineering team. In this role, you will be responsible for ensuring the functional correctness, robustness, and…
Design Verification Engineer II
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most…
ASIC Digital Design, Sr Staff Engineer 18870
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leadi ng silicon design, IP, simulation and analysis…