Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
The ASIC Design Engineer 2 will contribute to the development of high-speed networking chips by performing RTL coding, micro-architecture specification, and timing closure. This role involves working with state-of-the-art EDA tools to design and debug complex silicon modules for routers and switches.
The Systems/Embedded Software Engineer designs and maintains embedded software for ASIC-based products, collaborating with hardware teams to ensure system performance. The role involves using C, Rust, and AI-assisted tools to develop low-level components and debug complex hardware-software interactions.
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to…
Seeking a highly motivated and innovative digital design engineer with knowledge of ASIC development flow. The candidate would be working as part of a highly experienced mixed-signal design and verification team,…
Sr. Staff ASIC Design Engineer responsible for microarchitecture and RTL design of high-performance AI inference ASICs using Verilog/SystemVerilog, integrating CPU and third-party IPs, and collaborating with physical design and verification teams.
About Bitdeer Technologies Group Bitdeer is a world-leading technology company for AI and Bitcoin mining infrastructure. Bitdeer is committed to providing comprehensive Bitcoin mining solutions for its customers and…
Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems Determines architecture and logic design, design verification through software developed for component and system simulation and…
Drive post-silicon productization of bitcoin mining ASICs from bring-up through mass production, developing ATE test programs, optimizing yield, and performing silicon data analysis across cross-functional teams.
ASIC Design Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard
Company: Qualcomm Israel Ltd. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in…
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: 8 to 11 years of work experience in ASIC/SoC Design Experience in Logic design…
Apple is offering GPU internships in the UK focused on RTL design, power optimization, and physical design for Apple Silicon. Interns will collaborate with engineering teams on chip architecture, power analysis, and ASIC design flows using languages like C++, Python, and Verilog.
The Staff/Sr Staff Engineer will lead RTL design and micro-architecture development for complex IP and subsystems within Renesas MCU products. The role involves collaborating with cross-functional teams to ensure PPA targets are met using industry-standard EDA tools.
The Principal Engineer will lead RTL design and micro-architecture development for complex IP and subsystems within MCU SoCs. The role involves collaborating with cross-functional teams to ensure PPA targets are met while mentoring junior engineers and improving design methodologies.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
Design Verification Engineer at Cisco Acacia tests and automates verification of photonic integrated circuit (PIC) devices, debugs new optoelectronic components, and improves production yields using Python, RF/EO testing, and coherent optical methods.
ASIC Design Engineer working on mixed-signal chips for GPU power delivery and management, defining micro-architecture and developing RTL behavioral models through the full ASIC design flow to tape-out.
Designs and verifies PCIe controllers for NVIDIA’s GPUs/SOCs using UVM/Specman/e, building reusable testbenches and ensuring correctness via coverage-based methodologies.
The Senior Staff Digital Design Engineer will lead the design, implementation, and verification of DSP algorithms and digital control logic for audio processing within ASIC systems. This role involves the full ASIC design flow, from specification to silicon bring-up, utilizing expertise in digital signal processing and mixed-signal integrated circuits.
We couldn't check your fit for this role — add a CV to your profile to see it next time.