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Join onsemi’s new and growing RISC-V division and help ensure the functional correctness, quality, safety, and security of configurable and customizable RISC-V CPU IP. You will participate in the complete verification…
Date Posted: 2026-09-03 Country: United States of America Location: US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDG Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements:…
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Next Generation, High-Speed, Memory and Cache Controller Design Team is looking for a Senior…
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible…
The Memory Technology Group is at the core of Sandisk's engineering organization. We are building a cutting edge 3D memory in our multi-billion dollars lab. Our memory provides performance, power, and endurance at…
A senior ASIC design engineer who designs, verifies, brings up, and debugs digital subsystems in electro-optical SoCs for Ayar Labs' co-packaged optics that move data for AI systems. Day to day: RTL in Verilog/SystemVerilog, testbenches, timing constraints and documentation, and Python-driven silicon bring-up.
Sr. Staff Engineer designing and debugging digital subsystems for Ayar Labs' electro-optical ASICs (co-packaged optics that move AI data over light). Day to day: writing RTL in Verilog/SystemVerilog, building testbenches, defining timing constraints, and doing silicon bring-up/debug with Python, C/C++, and firmware — on-site in San Jose.
Responsibilities: Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs. Integrate and validate IP blocks within the larger system, ensuring…
About the Role We are seeking a Digital Hardware Intern to support the design, verification, and integration of digital systems in TetraMem’s AI accelerators. You’ll contribute to RTL design, simulations, and…
Responsibilities: Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs Integrate and validate IP blocks within the larger system, ensuring seamless…
For over 20 years IC Enable has successfully provided design IP, IC products, services and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus…
IC Enable is seeking an experienced RTL Design Engineer to support digital IC development from architecture through implementation. This role is ideal for an engineer with strong Verilog/SystemVerilog RTL design…
For more than 20 years, IC Enable has delivered world-class design IP, semiconductor products, engineering services, and platform solutions to customers ranging from innovative startups to Fortune 50 companies. Our…
NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new…
The Memory Technology Group is at the core of the Legacy Sandisk Engineering Organization. We are building a cutting edge 3D memory in our multiple billion dollars Fab. Our memory provides performance, power, and…
Meet the Team We are part of the Common Hardware Group, with our team specializing in FPGA development. Our work spans both sophisticated data-path and challenging control-path FPGAs. The design process includes…
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…
At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and…
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