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WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Designs, verifies, and debugs FPGA-based communication modules for advanced UAV platforms using AMD/Xilinx tools, collaborating with hardware and software teams.
Design Verification Engineer builds and runs SystemVerilog/UVM testbenches to verify high-speed SerDes IP for PCIe, Ethernet, and other interfaces, debugging RTL and testbench issues.
Designs and validates security architectures for NXP’s next-gen SoCs and embedded systems, ensuring protection against cyber and physical attacks in automotive, IoT, and payment applications.
Designs and implements ultra-high-speed Ethernet test platforms using cutting-edge FPGAs, focusing on Layer 1–4 protocols and next-gen standards like 1.6Tbps Ethernet.
Leads the design and integration of digital subsystems for Automotive Ethernet PHY products, including PCS logic, safety mechanisms, and system-level validation in a semiconductor environment.
Design verification engineer building and running UVM/SystemVerilog testbenches for AR display ICs using Siemens Questa, plus coverage closure and automation in Linux.
Senior engineer verifying next-gen mobile GPU subsystems using SystemVerilog/UVM, C++, and constrained-random testing to ensure functional correctness and performance for Samsung’s Xclipse GPU.
Lead hardware emulation and FPGA prototyping for semiconductor customers, designing advanced verification solutions for high-speed protocols like PCIe and CXL.
Designs and verifies FPGA hardware using VHDL/Verilog/SystemVerilog, UVM testbenches, and Xilinx tools, while guiding a remote verification team on DO-254 processes.
Senior Principal Engineer SoC Design Location: Pune Time Type: Full time Job Description Summary: We are seeking a highly experienced System-on-Chip (SoC) Designer with 15+ years of expertise to lead architecture and…
Senior Lead Emulation / FPGA Prototyping Engineer Location: Pune Time Type: Full time Job Description Role Summary: We are seeking a skilled and motivated FPGA Prototyping/Emulation Engineer to join our hardware design…
Manages a team that verifies the correctness of complex silicon designs for Google's hardware platforms using advanced verification methods like SystemVerilog and collaborates with architecture teams.
Senior Digital ASIC Design Engineer Location: Upton, NY Time Type: Full time Job Description The mission of the Instrumentation Division is to develop state-of-the-art instrumentation required for experimental research…
Senior Engineer, Digital Design Engineering Location: Spain, Valencia, Cortes Valencianas, Italy, Catania, Ireland, Cork Time Type: Full time Job Description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is…
Designs and verifies digital circuits for FPGA and ASIC implementations, coding HDL modules and collaborating with cross-functional teams to meet performance and reliability targets.
Leads the design and deployment of networking IP blocks for Google Cloud's custom silicon, using ASIC/SoC methodologies and RTL coding (Verilog/SystemVerilog/VHDL) to deliver high-performance, low-latency hardware solutions.
Leads a hardware design team developing 5G baseband IP for satellite-based base stations, focusing on power efficiency and delivery of Layer 1 IP using RTL, FPGA, and ASIC techniques.
Designs and implements FPGA/ASIC hardware for satellite-based 5G base stations, focusing on signal processing and power efficiency using Verilog/SystemVerilog and EDA tools.
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