Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Position : Staff Engineer Seeking highly experienced and motivated NoC Design lead to…
Company: Qualcomm Israel Ltd. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm’s Peripheral IP organization is looking for a Senior Design Verification Engineer to develop…
Designs high-performance PCIe Gen6/Gen7 switch ASIC IP using SystemVerilog, focusing on RTL implementation, timing closure, and architecture for next-gen connectivity solutions.
Senior Architect defines next-gen chip interconnects like NVLink, optimizing performance and power while driving ASIC design and cross-team implementation.
A Product Test Engineer at Cisco develops and manages test solutions for advanced networking silicon, ensuring production targets are met by resolving hardware/software issues, optimizing yield, and collaborating with OSATs and engineering teams.
Role Overview As a Senior ASIC Design Engineer, you will take a leadership role in defining, implementing, and delivering critical IP blocks and subsystems for Positron.ai’s inference ASICs/SoCs. You will own the…
Role Overview We are looking for a Director of ASIC Design to drive the design, development, verification, and execution of high-performance AI inference chips. This role requires deep technical expertise in ASIC…
Designs and verifies high-speed interface IP for next-gen storage subsystems (NVMe/Chiplet) in ASICs, leading RTL development through silicon bring-up for enterprise and AI data center storage solutions.
Role Overview As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for developing and…
Design and verify custom silicon chips for next-generation data storage hardware, using RTL, Verilog/SystemVerilog, and digital logic while collaborating with cross-functional engineering teams.
Design and verify custom silicon and hardware for next-generation data storage devices, collaborating across ASIC, firmware, and systems engineering teams using RTL, Verilog, and embedded C/C++.
Designs low-power wireless System-on-Chip solutions, writing RTL code and guiding the SoC through synthesis, timing analysis, and tape-out while collaborating with global teams.
Lead FPGA design and architecture for defense electronics using VHDL, targeting Xilinx/Altera/Microsemi devices, and verify with constrained-random testing.
The application window is expected to close on: 08/28/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . The Common Hardware Group (CHG) creates…
Designs and validates high-speed optical communication chips, writing RTL, running simulations, and debugging silicon to meet power and performance targets.
Manage GPU hardware development programs from IP to commercialization, coordinating cross-functional teams to deliver mobile GPUs with features like ray tracing for Samsung Galaxy devices.
Analog & Mixed-Signal ASIC Design Engineer At Tektronix, we believe innovation starts with our customer. This approach has led us to a seventy-five-year history of delivering outstanding solutions to customers in…
Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.…
Company: Qualcomm Semiconductor Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a forward-thinking technology company, Qualcomm advances the limits of innovation in…
We couldn't check your fit for this role — add a CV to your profile to see it next time.