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Senior Firmware Engineer
Overview Are you passionate about working on cutting edge new technology in security with a team that embodies the growth mindset? Are you hoping to join an organization which is built on a mission “To empower every…
Senior Firmware Engineer
Overview Microsoft Silicon and Cloud Hardware Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE…
Product Design Engineer
Designs and improves connector products for a global interconnect-solutions manufacturer in Senai, Johor (hired via recruiter Hunters International): translating customer requirements into drawings/specs, performing DFMEA and tolerance analysis, aligning DFM with process design, and reducing manufacturing costs using CREO and ANSYS. Requires 7+ years' product design experience and Mandarin/English
Principal Firmware Engineering Manager
Overview The Microsoft Silicon Engineering Solutions and Cloud Hardware Infrastructure Engineering (SCHIE) team is responsible for developing and delivering the hardware and firmware that is responsible for powering…
Sr. Firmware Engineer
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
Staff FPGA Engineer
The Staff FPGA Engineer will lead the architecture, development, integration, and support of FPGA-based platforms used throughout Cytek's flow cytometry and imaging instrumentation portfolio. This role is responsible…
Linux Systems Administrator
Hands-on infrastructure engineer at RapidFort, split ~70% Linux systems engineering/automation and ~30% data center work (hardware, storage, network) from their San Francisco Bay Area location. Builds, hardens, and patches Linux systems and automates with Bash, Python, and Ansible, while also racking servers, provisioning SAN/NAS, and making network changes.
ASIC Design Engineer, PCIe IP Enablement
Design and integrate AMD's PCI Express (PCIe) subsystem IP into SoCs: RTL implementation, synthesis with timing/lint/CDC closure, test/debug/clock design, and UPF-based low-power flows, working across IP, physical design, and SoC teams. Core stack: Verilog/RTL, synthesis/CDC/LEC/STA tools, UPF power-aware design.
Post-Silicon Validation Engineer (Multiple Levels)
About The Role Celero is seeking Post-Silicon Validation Engineers to join our validation team for next-generation coherent DSP ASICs powering AI and hyperscale optical networking. As a member of our engineering team,…
FPGA Engineer
Designs and optimizes high-performance FPGA/SoC solutions in VHDL/Verilog on Xilinx 7-Series/UltraScale and Zynq platforms, building DSP and RF/SDR signal-processing chains with Vivado. Full-time hybrid role in Warsaw at a dual-use startup building RF intelligence solutions for defense.
Digital Design Electrical Engineer
We don’t just build technology—we engineer the future. From next-gen aerospace to cutting-edge defense systems, we tackle the toughest, mission-critical challenges that keep people safe and push the limits of…
Senior Hardware Security Engineer
Overview Do you want to be at the forefront of innovating the latest hardware designs to propel Microsoft’s cloud growth? Are you seeking a unique career opportunity that combines technical capabilities, cross-team…
FPGA Engineer
About Barber-Nichols: Barber-Nichols (BN) is a premier provider of custom turbomachinery solutions serving the Defense, Aerospace, Cryogenics, and Energy industries. Our team consists of industry leaders who…
Sr Embedded Software Engineer
Overview Continental Electronics Corporation is a leading provider of RF technologies and innovative solutions with 80 years of proven performance. CEC has experienced significant recent growth and has established…
FPGA Design Engineer
FPGA Design Engineer owning the design and implementation of FPGA-based interfaces (PCIe, I2C, SPI, high-speed GT) on Xilinx UltraScale+ and Versal platforms for quantum computing control systems.
Hardware - Design Verification Engineer
Hardware Design Verification Engineer at FuriosaAI responsible for defining and implementing verification plans, building test benches, and debugging design failures using SystemVerilog/UVM methodologies and EDA tools.
Hardware - Physical Engineering (PI/PD) Engineer
Designs and optimizes AI hardware architectures, focusing on performance, power, and area (PPA) metrics. Uses Verilog, EDA tools, and scripting to perform synthesis, equivalence checking, and timing analysis for chip-level designs.
Hardware - Senior Design Verification Engineer
Designs and executes verification strategies for AI hardware, ensuring functional correctness and coverage of block/system-level designs using SystemVerilog/UVM and Python-based tools.