Hardware - Physical Engineering (PI/PD) Engineer
About FuriosaAI
FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, along with a compiler-focused R&D lab in Lisbon.
Our vision is to make AI computing sustainable, enabling access to powerful AI for everyone on Earth. We solve the AI hardware energy and operational cost crisis at the architectural level, rather than through brute force, building the world's first truly AI-native compute platform to unlock the full potential of artificial intelligence for every enterprise.
Key Responsibilities
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Evaluate the PPA of our design as part of the chip architecture planning process.
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Perform synthesis, logic equivalence checking, SDC & UPF development, and static timing analysis.
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Work collaboratively with a design house to achieve the best outcome.
Minimum Qualifications
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Bachelor’s degree in Electronic Engineering or other technically related fields
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Experience with using Verilog HDL for digital logic design
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2+ years of industry experience with logic synthesis, LEC, STA, producing SDC & UPF
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Experience with EDA tools (Synopsys tool chain, DC, FM, PT) and scripting (TCL, shell)
Preferred Qualifications
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5+ years of industry experience with ASIC design
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DFT, Place and Route experience
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Experience with high-speed connectivity IPs (e.g., PCIe, Ethernet, HBM)
Contact
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recruit@furiosa.ai