Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Designs high-speed VLSI circuits for next-gen CPU cores and caches using deep submicron FinFET processes, optimizing power, performance, and area while collaborating across teams.
Lead a team to implement and tape out high-performance ASIC/APU/dGPU designs for AI, gaming consoles, and automotive using RTL-to-GDS flows, PnR, timing closure, and physical verification.
Senior engineer verifying complex processor designs using SystemVerilog/UVM, formal tools, and coverage-driven flows to ensure functional correctness of Network-on-Chip IPs and SoCs.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Verify and validate AMD’s next-gen GPU and SoC designs using SystemVerilog/UVM, emulation platforms, and formal methods to ensure silicon meets performance, power, and functional specs.
Develop embedded C/C++ software and Linux platform support for AMD Adaptive SoCs and Ryzen AI Embedded processors, building computer vision, graphics, and edge AI pipelines for robotics and industrial automation.
Senior engineer designing and implementing embedded firmware for AMD’s next-gen networking products, collaborating with silicon, driver, and test teams to deliver high-performance network stacks for cloud and AI systems.
Designs digital IP blocks and SoCs for automotive systems, writing RTL in Verilog/VHDL and collaborating with verification, physical implementation, and validation teams.
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive…
Design and implement synthesizable RTL for complex ASICs using Verilog/SystemVerilog, optimizing for power, performance, and area while collaborating with verification and physical design teams.
Designs and verifies GPU and control subsystems for AI-focused SoCs, integrating Arm IP and third-party components for edge, physical, and cloud AI applications.
Lead a team to design and deliver embedded memory compilers (SRAM, ROM, register files, DPRAM) across process nodes, setting technical direction and driving PPA optimization while serving as the senior technical voice in customer engagements.
Design Verification Engineer at AMD responsible for verifying custom hardware accelerators for servers, datacenters, and client/embedded markets using advanced ASIC verification techniques and methodologies like UVM and formal verification.
Lead a global team to design, develop, and deploy embedded firmware for UPS systems using C/C++, RTOS, and control systems, ensuring product quality and alignment with customer needs.
Cleeven is an Engineering, R&D and IT consulting group enabling our clients support in their R&D efforts and operational excellence. We have know-hows in terms of innovation and R&D in a wide range of…
Design and validate next-gen NAND Flash memory chips, running Verilog simulations and AI-assisted tools to catch circuit flaws before and after silicon fabrication.
Develops FPGA-based security test infrastructure to validate DRAM resilience, mitigation effectiveness, and attack surfaces using Verilog/SystemVerilog, Python/C++, and AI-assisted tools like Claude.
DMTS, DRAM Systems Location: San Jose, CA, Folsom, CA Time Type: Full time Job Description Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in…
Design and verify next-gen memory chips, from full-chip functional checks to mixed-signal circuits and array architecture, using SystemVerilog, SPICE, and Cadence tools.
Principal RTL Design Engineer at Micron leads DRAM digital and mixed-signal IP development, owning RTL design from architecture to silicon-ready signoff while optimizing power, performance, and area.
We couldn't check your fit for this role — add a CV to your profile to see it next time.