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The Physical Design Engineer will manage the end-to-end physical implementation of System-on-Chips (SoCs) for drone autonomy technology, covering tasks from synthesis to GDSII sign-off. The role involves utilizing industry-standard EDA tools to ensure timing closure, power efficiency, and physical verification.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
The Senior SoC Design Verification Engineer leads the verification of complex SoC features and subsystems using SystemVerilog and UVM. The role involves driving verification methodology, ensuring silicon sign-off, and mentoring engineering teams.
DFX RTL design engineer on AMD's Client SOC DFX team, planning and implementing DFX features (JTAG, Scan, Boundary Scan, Debug) and low-power UPF support for next-gen microprocessors using Verilog/SystemVerilog/VHDL and scripting languages.
Develops Python/SQL ETL solutions to modernize legacy Perl scripts and migrate data workloads to AWS and Snowflake.
Principal Logic Design Engineer responsible for micro-architecture and RTL design of next-generation high-performance memory controllers for data centers and AI applications, using SystemVerilog/Verilog and collaborating with verification and physical design teams.
About Latitude.sh Latitude.sh global computing platform was launched in 2019, enabling businesses to programmatically deploy single-tenant Bare Metal instances in different parts of the world. We are a team of…
The Managed Services Analyst leads delivery and production support for payment platforms, working with stakeholders to manage product updates, scheme compliance, and technical solutions. The role requires extensive experience in C++, Unix/Linux, and SQL, alongside strong leadership skills to manage both local and offshore teams.
Integration and test engineering role at a defense technology company; the posting provides no details on day-to-day responsibilities or core technologies.
Work as a Software Development Engineer in Amazon S3's Asynchronous Services team, building scalable software for trillions of objects (e.g., Lifecycle, Access Logs) using languages like C#, C++, Java, or Perl.
Staff - Advanced Technical Support Engineer - Switching (EX/QFX)This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is…
Fortinet is looking for C Developers with a passion to improve and expand the rich feature set of our FortiGate firewall. You will join a dedicated team creating an innovative Unified Threat Management (UTM) feature…
Administers and optimizes HPC clusters for CAE (Computer-Aided Engineering) workloads, managing job schedulers, Linux systems, CAE applications, and infrastructure to ensure stability and performance.
A Senior Mask Design Engineer at NVIDIA designs and develops sophisticated layouts of silicon interposers for GPU products, collaborating with technical leads and teams to ensure product packages meet performance and manufacturing requirements using Cadence tools.
Designs and runs RTL validation for Intel’s IP blocks, using System Verilog and UVM to verify DDR5/LPDDR5 and debug failures before tape-out.
Designs, configures, and maintains middleware and PaaS platform services across on-premises and cloud environments, focusing on automation, containerization, and operational efficiency to support Deutsche Bank’s application teams.
Builds and maintains real-time financial market data pipelines, ensuring accuracy, low-latency distribution, and integration with exchanges/vendors. Core tech: FIX/TREP protocols, cloud (AWS/GCP), scripting (Python/Bash), and network optimization.
Develops and maintains backend systems for FIS’s Tax Information Reporting Suite and Core Services, focusing on Python scripting, RDBMS, SQL, and ETL workflows to ensure scalable, reliable, and high-quality fintech solutions.
You’ll lead the run-phase of FIS’s payment-as-a-service platform, coordinating offshore/local teams to deliver enhancements, maintain annual updates, and ensure scheme compliance for banking clients.
The Semiconductor Design Engineer designs and analyzes digital and analog circuits for memory products, managing layout, verification, and simulation processes. The role involves collaborating with cross-functional teams to optimize manufacturing and ensure product quality using tools like Cadence Virtuoso, SPICE, and various hardware description languages.
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