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Principal Design Engineer at Rambus to architect and implement next-gen PCIe IP in System Verilog, prototype on FPGAs, and collaborate with global teams.
About the team Our team is building industry-leading, highly efficient, and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong…
Designs and verifies digital sub-circuits for high-performance micro-controllers using Verilog/SystemVerilog, synthesis, and formal verification, collaborating with analog and software teams.
Internship assisting in the design and physical implementation of digital and mixed-signal ICs for power management and signal functions using ASIC tools like synthesis and P&R flows.
Principal Design Engineer at Microchip Technology leading hardware/firmware co-development and pre/post-silicon verification using emulators and FPGA platforms for SoC devices.
Designs and verifies hardware security IP for SoCs, including cryptography, key management, and secure boot, using Verilog and scripting.
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: We are seeking a highly skilled and experienced IP Design Engineer to join our dynamic…
Design and implement FPGA firmware for next-gen radar and sensing systems, integrating with software and hardware for defense and commercial applications.
Design and implement FPGA-based signal processing for next-gen radar and sensing systems, integrating with software and hardware in a defense-focused R&D environment.
With our groundbreaking satellite 5G constellation, OQ Technology is a global leader in IoT communication connectivity and associated services. We are a venture capital-backed company with a successful track record of…
Designs AI inference systems and memory architectures, optimizing performance, power, and scalability while co-designing hardware and software for advanced memory tech.
Design and integrate secure ASIC subsystems to protect Apple’s SoCs from side-channel attacks and ensure data integrity using RTL, UPF, and cryptographic engines.
Designs and integrates secure ASIC subsystems to protect Apple’s SoCs from side-channel attacks and ensure data integrity using RTL, cryptographic engines, and hardware defenses.
Lead end-to-end execution of complex SoC and processor programs, owning architecture through commercialization while aligning cross-functional teams and managing technical/business risks.
Design and implement high-performance CPU frontend features for RISC-V cores using Chisel/Verilog, focusing on instruction fetch, decode, and branch prediction while collaborating with verification and physical design teams.
Lead a team designing CPLD/FPGA logic for server and storage products using Verilog/VHDL, I2C, SPI, and validation flows.
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Position : Staff Engineer Seeking highly experienced and motivated NoC Design lead to…
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and…
About ChipAgents ChipAgents is reinventing semiconductor design and verification through agentic AI workflows. Founded by leading experts in AI and chip design, we work with top-20 semiconductor companies, major cloud…
Design and verify RTL hardware designs and SystemVerilog/UVM testbenches to train AI agents that automate chip design workflows.
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