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NVIDIA Backed by SequoiaBacked by SoftBank Vision Fund
9 views 2 months ago

Senior Firmware Verification and Bringup Engineer

Open 47d North AmericaSenior
United States

We are now looking for a Senior Firmware Verification and Bringup Engineer to join our Memory Subsystem Team! Widely considered to be one of the technology world’s most desirable employers, NVIDIA is an industry leader…

Agentic AI AI Automation C++ Embedded Systems +7 skills
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Altera Corporation
5 views 2 months ago

Senior FPGA RTL and Firmware Development Engineer

Open 47d APACSenior
Malaysia

Job Details: Job Description: Position Overview Altera is seeking an experienced FPGA RTL and Firmware Development Engineer to join the Platform Hardware Board Engineering team. This role is intended for a hands-on…

Agentic AI AI Automation CI/CD Corrective Action +15 skills
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Analog Devices
3 views 2 months ago

Staff Systems Design Engineer

Open 46d North AmericaFull-timeStaff Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI,…

Agentic AI AI Automation Cadence Virtuoso Cmos +7 skills
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hctz.fa.us2.oraclecloud.com/CX
4 views 2 months ago

Intern in Digital RTL design and automation

EuropeInternshipIntern
Switzerland

About Us At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the way in creating a safer, cleaner,…

Automation Bash FPGA Linux Networking +4 skills
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hctz.fa.us2.oraclecloud.com/CX
4 views 2 months ago

Intern Digital IC Design

EuropeInternshipIntern
Switzerland

Intern in Digital IC Design About Us At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world’s most complex challenges and lead the way in…

Bash Bluetooth C++ FPGA Linux +8 skills
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Infineon
12 views 2 months ago

Internship - Analog Mixed Signal Design

Open 39d On-siteNorth AmericaInternshipIntern
United States

#WeAreIn to create tiny chips and big careers. Are you ready to take the first step of your career? Let's shape the future together! Whether you join as a student, intern or trainee, you'll be part of something real -…

Automation Bash Firmware I2c IoT +7 skills
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Renesas Electronics
2 months ago

Digital Verification Manager

Open 49d Europe
Greece

We are seeking an experienced and highly motivated Verification Manager to lead and grow our digital hardware verification capabilities. This role combines strong hands-on technical expertise in digital verification…

Agile IoT Performance Management Rtl Stakeholder Management +2 skills
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Anlage Infotech
2 months ago

Design Verification Engineer - PCI-e/SystemC

APAC
India

Design Verification (DV) Sr. Design Lead Qualification : B.E / M.E / M.Tech or B.S / M.S in EE / CE Experience Level : 7 - 18 years Job Location : Bangalore, Chennai & Hyderabad Specialization : PCIe SystemC IP /…

Automation Jenkins MATLAB PCIe Perl +5 skills
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Apple Backed by Sequoia
5 views 2 months ago

PMU Design Verification Intern (m/f/d)

Open 48d EuropeInternshipIntern
Germany

An intern on Apple's Munich power management chip team helps verify power management IC designs: developing verification components, defining test plans, writing behavioral/functional models, and analyzing/debugging simulations. Core tech includes analog and digital circuit understanding, plus Verilog/SystemVerilog.

SystemVerilog Verilog
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Synopsys
16 views 2 months ago

ASIC Digital Design, Sr Staff Engineer - 18585

Open 49d Staff

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…

AI PCIe Rtl SystemVerilog Verilog
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Lattice Semiconductor
7 views 2 months ago

Senior SoC Design Engineer

Open 48d APACSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
China

Defines and develops IP for specific solutions, integrates IPs into SoCs, and runs SoC-level functional verification and performance evaluation, plus board bring-up and joint debugging with software engineers. Core stack: Verilog/SystemVerilog, AXI/AHB/Wishbone buses, FPGA design flow, and simulators like Ncsim/Modelsim.

FPGA I2c PCIe SystemVerilog UART +1 skills
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МТУСИ
9 views 2 months ago

Инженер - разработчик ПЛИС

Open 48d CIS
Russia

Обязанности: Разработка и верификация цифровых устройств на основе ПЛИС (FPGA) для спутниковых систем связи. Участие во всем жизненном цикле проекта: от анализа требований и разработки архитектуры до реализации,…

Ethernet FPGA MATLAB SystemVerilog Uvm +2 skills
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IPEOPLE BUSINESS SOLUTIONS
2 months ago

FPGA Design Engineer

APAC
India

Role : FPGA Design Engineer - Wireless Communication We are looking for an FPGA Design Engineer with 2+ years of experience in wireless communication to develop and integrate high-speed FPGA-based communication…

C++ FPGA OOP Rtl SystemVerilog +2 skills
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Radiant Industries
7 views 2 months ago

Senior FPGA Engineer, Verification

Open 51d On-siteNorth AmericaFull-timeSenior
United States

Lead verification of safety-critical FPGAs for Radiant's nuclear microreactor control, instrumentation, and communication systems — building SystemVerilog/UVM testbenches, driving coverage closure, and collaborating with RTL, hardware, and embedded software teams. Onsite in El Segundo, CA.

Bash Embedded Software Embedded Systems Ethernet FPGA +7 skills
158K – 219K $
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Shield AI Backed by a16z
2 months ago

Staff Engineer, FPGA Design (R5347)

Open 75d North AmericaPart-timeStaff Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Shield AI is a venture-backed defense-tech company with the mission of protecting service members and civilians with intelligent systems. Its products include Hivemind autonomy software, V-BAT and X-BAT aircraft, and…

AI CI/CD Ethernet Firmware FPGA +5 skills
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Virtu Financial
12 views 2 months ago

Hardware Engineer (FPGA)

Open 52d Europe Ireland permit employer — This employer was issued Irish employment permits this year or in the two years before, per the Department of Enterprise, Tourism and Employment. The permits belong to the employer and are not a commitment to sponsor this role.
Ireland

FPGA/ASIC engineer at Virtu Financial in Dublin designing and verifying RTL for low-latency trading applications on the firm's proprietary trading platform, owning designs from specification through verification to live production deployment using SystemVerilog/VHDL, cocotb, and Xilinx/AMD, Synopsys, and Cadence toolchains.

C++ Ethernet FPGA PCIe Python +4 skills
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Sandisk
5 views 2 months ago

Staff Engineer, VLSI Design Engineering

Open 52d APACStaff Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.
India

Staff-level VLSI design verification engineer at Sandisk in Bengaluru who leads verification of complex IP blocks and SoC designs: building UVM testbenches, driving functional coverage closure, writing SystemVerilog assertions, and running regressions with Cadence tools (Xcelium, Verdi, JasperGold), while mentoring junior engineers.

AI Automation Machine Learning Root Cause Analysis SystemVerilog +2 skills
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Advanced Micro Devices, Inc
14 views 2 months ago

Sr. Staff Design Verification Engineer

Open 52d North AmericaStaff
United States

Senior silicon design engineer on AMD's Radeon Technologies Group in San Jose (hybrid), implementing and verifying DFT architecture: scan insertion, ATPG pattern generation and gate-level simulation, test coverage/cost analysis, and post-silicon bring-up support using tools like Tetramax, Testkompress, and VCS.

AI Automation Bash FPGA PCIe +9 skills
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Neurophos
8 views 2 months ago

Staff Modeling Architect

Open 52d On-siteNorth AmericaFull-timeStaff H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Staff modeling architect at a silicon-photonics AI chip startup: builds performance/energy models and bit-accurate functional models of an optical AI inference accelerator, co-designing tiling, ISA, and memory hierarchy with compiler and RTL teams. Core stack: modern C++, Python (NumPy/Pandas), simulator kernels (SystemC/gem5-style), Verilator/SystemVerilog.

AI C++ Event Driven Architecture FPGA GPU +13 skills
250K – 290K $
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Neurophos
8 views 2 months ago

Modeling Architect

Open 52d On-siteNorth AmericaFull-time H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Hands-on modeling architect for Neurophos' T100 optical AI inference accelerator, building analytical performance models (roofline/limiter), Python/C++ functional and power models, and RTL simulations. Works on hardware/software co-design of workloads, memory hierarchy, ISA, and scheduling alongside compiler, runtime, and RTL teams.

AI C++ CUDA Event Driven Architecture GPU +8 skills
170K – 200K $
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