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Job Details: Job Description: Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements. Defines and develops…
Date Posted: 2026-08-31

 Country: United States of America

 Location: US-IN-INDIANAPOLIS-206 ~ 3939 Priority Way S Dr ~ PRIORITY BLDG 6

 Position Role Type:…
We are hiring a skilled DPU Performance Validation Engineer for our DPU product lines. This includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems.…
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Designs and optimizes AI hardware architectures, focusing on performance, power, and area (PPA) metrics. Uses Verilog, EDA tools, and scripting to perform synthesis, equivalence checking, and timing analysis for chip-level designs.
Designs and implements high-performance digital ASIC blocks for AI infrastructure connectivity chips, from RTL to backend, using Verilog/SystemVerilog and EDA tools.
The Design Verification Engineer will develop verification environments, test plans, and perform functional RTL testing at the IP and SoC levels. The role requires expertise in ASIC verification methodologies, SystemVerilog, and various communication protocols.
What are your contributions to the team? In your role, you will review and assess supplier’s airborne software and electronic hardware designs to ensure they meet Bombardier’s technical requirements and regulatory…
Overview of Role As an IP Alliance Manager you will work with vendors from the TSMC’s IP Alliance. Responsibilities include enabling IP vendors to populate the IP Ecosystem on TSMC’s technology. You will directly work…
Signal Processing Architect (Consultant / Senior Consultant) Radio Systems Division | NECTML (An NEC Company) 📍 Leatherhead, Surrey (Hybrid/Remote within the UK) 🕒 Full Time | Permanent Help Shape the Future of…
Design and implement a high-performance, low-power ASIC accelerator for AI inference in autonomous-driving perception modules using Verilog, SoC IP integration, and timing/power optimization.
Front-end ASIC design engineer on Apple's Pixel IP team, writing RTL and micro-architectural specs for high-performance, low-power image/video processing pipelines in next-gen SoCs.
Front-end ASIC Design Engineer responsible for designing high-performance, power-efficient pixel processing engines for Apple's SoCs using RTL or high-level synthesis methodologies.
Leads technical authority for high-voltage automotive ASIC analog/mixed-signal design, shaping chip architecture, risk mitigation, and integration across disciplines. Focuses on safety-critical automotive ICs, mentoring, and methodology improvements.
Build and optimize front-end CAD methodologies and verification flows for Ericsson’s 5G/6G ASICs and FPGAs using SystemVerilog/UVM, EDA tools, and CI pipelines, with a focus on AI-driven automation.
Job Details: Job Description: The Staff Application Engineer position is in Worldwide Regional Applications group, located in Bangalore, India for an experienced application engineer to focus on FPGA usage in 5G with…
This role involves designing and verifying digital hardware, including ASICs and FPGAs, for defense applications using RTL design, simulation, and testbench development. The position requires U.S. citizenship and the ability to obtain a DoD Secret security clearance.
Develops embedded security solutions for defense/aerospace systems, focusing on anti-tamper, cybersecurity, and supply chain risk management to protect military technology. Works with DoD compliance and threat modeling for weapons/embedded systems.
Develop embedded security solutions for weapons systems at RTX (Raytheon), focusing on anti-tamper, cybersecurity, and supply chain risk management. Day-to-day work involves threat modeling, CPI assessments, requirements flow-down, and ensuring DoD compliance for real-time embedded systems.
Analog IC Design Engineer Cork Permanent - Hybrid Salary: up to £110,000 DOE + Benefits Are you an experienced Analog IC Design Engineer looking to work across the full ASIC development lifecycle? Want to take…
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